PCA2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 25 November 2011 7 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
8.5 Type recognition
Byte D is read to determine, which type of the PCA200x family is used in a particular
application.
Table 6. Description of word A bits
Bit Value Description
Inhibit time
1 to 7 - adjust the number of the 8192 Hz pulses to be removed;
bit 1 is the MSB and bit 7 is the LSB
Calibration period
801minute
12minutes
Table 7. Description of word B bits
Bit Value Description
Pulse width t
p
(ms)
1 to 3 000 0.98
001 1.95
010 2.9
011 3.9
100 4.9
101 5.9
110 6.8
111 7.8
Output period (s)
4to6 000 1
001 5
010 10
011 20
100 30
Duty cycle of motor pulse
7075 %
1100 %
Pulse stretching
8 0 no pulse stretching
1 a pulse width of 2 t
p
and a duty factor of 25 % are added
Table 8. Description of word D bits
Bit Value Description
Type recognition
1 to 4 0000 PCA2002
1000 PCA2000
0100 PCA2001
1100 PCA2003
PCA2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 25 November 2011 8 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
8.6 Programming procedure
To ensure that the oscillator starts up correctly you must execute a reset sequence (see
Figure 4
).
For a watch it is essential that the timing calibration can be made after the watch is fully
assembled. In this situation, the supply pins are often the only terminals which are still
accessible.
Writing to the OTP cells and performing the related functional checks is achieved in the
PCA2002 by modulating the supply voltage. The necessary control circuit consists
basically of a voltage level detector, an instruction counter, which determines the function
to be performed, and an 8-bit shift register, which allows writing the OTP cells of an 8-bit
word in one step and which acts as data pointer for checking the OTP content.
State 1; measurement of the crystal oscillator frequency (divided by 1024)
State 2; measurement of the inhibition time
State 3; write/check word A
State 4; write/check word B
State 5; check word C (don’t care since no meaning)
State 6; check word D (type recognition)
Each instruction state is switched on with a pulse to V
P(prog)(start)
. After this large pulse, an
initial waiting time of t
0
is required. The programming instructions are then entered by
modulating the supply voltage with small pulses (amplitude V
P(mod)
and pulse width t
mod
).
The first small pulse defines the start time, the following pulses perform three different
functions, depending on the time delay (t
d
) from the preceding pulse (see Figure 5,
Figure 6
, Figure 7, Figure 8 and Figure 9):
t
d
=t
1
(0.7 ms); increments the instruction counter
t
d
=t
2
(1.7 ms); clocks the shift register with data = logic 0
t
d
=t
3
(2.7 ms); clocks the shift register with data = logic 1
The programming procedure requires a stable oscillator, which means that a waiting time,
determined by the start-up time of the oscillator, is necessary after power-up of the circuit.
t
d(start)
: start delay time.
V
DD(nom)
: nominal supply voltage.
Fig 4. Supply voltage at start-up during production and testing
V
DD
V
P(prog)(stop)
t
d(start)
> 500 ms
V
SS
V
DD(nom)
001aac503
t
p(stop)
PCA2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 25 November 2011 9 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
After the V
P(prog)(start)
pulse, the instruction counter is in state 1 and the data shift register
is cleared.
The instruction state ends with a second pulse to V
P(prog)(stop)
or with the pulse to V
store
.
In any case, the instruction states are terminated automatically 2 seconds after the last
supply modulation pulse.
8.7 Programming the memory cells
Applying the two-stage programming pulse (see Figure 5) transfers the stored data in the
shift register to the OTP cells.
Perform the following to program a memory word:
1. Starting with a V
P(prog)(start)
pulse, wait for the time period t
0
then set the instruction
counter to the word to be written (t
d
=t
1
).
2. Enter the data to be stored into the shift register (t
d
=t
2
or t
3
), LSB first (bit 8) and
MSB last (bit 1).
3. Applying the two-stage programming pulse V
prestore
followed by V
store
stores the word.
The delay between the last data bit and the pre-store pulse V
prestore
is t
d
=t
4
. Store the
word by raising the supply voltage to V
store
; the delay between the last data bit and the
store pulse is t
d
.
The example shown in Figure 5
performs the following functions:
Start
Setting the instruction counter to state 4 (word B)
Entering data word 110101 into the shift register (sequence: LSB first and MSB last)
Writing the OTP cells for word B
The example shows the programming of B = 110101 (the sequence is MSB first and LSB last).
V
DD(nom)
: nominal supply voltage.
Fig 5. Supply voltage modulation for programming

PCA2002U/AB/1,026

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Motor / Motion / Ignition Controllers & Drivers 32KHZ WATCH CIRCUIT
Lifecycle:
New from this manufacturer.
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