Philips Semiconductors Product data sheet
SC28L91
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
2004 Oct 21
10
ABSOLUTE MAXIMUM RATINGS
1
Symbol
Parameter Rating Unit
T
amb
Operating ambient temperature range
2
Note 4 °C
T
stg
Storage temperature range –65 to +150 °C
V
CC
Voltage from V
CC
to GND
3
–0.5 to +7.0 V
V
S
Voltage from any pin to GND
3
–0.5 to V
CC
+0.5 V
P
D
Package power dissipation (PLCC44) 2.4 W
P
D
Package power dissipation (PQFP44) 1.78 W
Derating factor above 25 °C (PLCC44) 19 mW/°C
Derating factor above 25 °C (PQFP44) 14 mW/°C
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other condition above those indicated in the operation section of this specification is not
implied.
2. For operating at elevated temperatures, the device must be derated based on +150°C maximum junction temperature.
3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima.
4. Parameters are valid over specified temperature and voltage range.
DC ELECTRICAL CHARACTERISTICS
1,
2,
3
V
CC
= 5 V ± 10 %, T
amb
= –40 °C to +85 °C, unless otherwise specified.
Symbol
Parameter Conditions Min Typ Max Unit
V
IL
Input low voltage 0.8 V
V
IH
Input high voltage (except X1/CLK) 2.4 1.5 V
V
IH
Input high voltage (X1/CLK) 0.8V
CC
2.4 V
V
OL
Output low voltage
I
OL
= 2.4 mA
0.2 0.4 V
V
OH
Output high voltage (except OD outputs)
4
I
OH
= –400 µA
V
CC
– 0.5 V
I
IX1PD
X1/CLK input current - power down
V
IN
= 0 V to V
CC
0.5 0.05 0.5 µA
I
ILX1
X1/CLK input low current - operating V
IN
= 0 V –130 0 µA
I
IHX1
X1/CLK input high current - operating V
IN
= V
CC
0 130 µA
Input leakage current:
I
I
All except input port pins V
IN
= 0 V to V
CC
–0.5 0.05 +0.5 µA
Input port pins
5
V
IN
= 0 V to V
CC
–8 0.05 +0.5 µA
I
OZH
Output off current high, 3-State data bus V
IN
= V
CC
0.5 µA
I
OZL
Output off current low, 3-State data bus V
IN
= 0 V –0.5 µA
I
ODL
Open-drain output low current in off-state V
IN
= 0 V –0.5 µA
I
ODH
Open-drain output high current in off-state V
IN
= V
CC
0.5 µA
Power supply current
6
I
CC
Operating mode CMOS input levels 7 25 mA
Power down mode CMOS input levels 1 5
mA
NOTES:
1. Parameters are valid over specified temperature and voltage range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of
5 ns maximum. For X1/CLK, this swing is between 0.4 V and 0.8V
CC
. All time measurements are referenced at input voltages of 0.8 V and
2.0 V and output voltages of 0.8 V and 2.0 V, as appropriate.
3. Typical values are at +25 °C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: C
L
= 125 pF, except open drain outputs. Test conditions for open drain outputs: C
L
= 125 pF,
constant current source = 2.6 mA.
5. Input port pins have active pull-up transistors that will source a typical 2 µA from V
CC
when the input pins are at V
SS
.
Input port pins at V
CC
source 0.0 µA.
6. All outputs are disconnected. Inputs are switching between CMOS levels of V
CC
– 0.2 V and V
SS
+ 0.2 V.
Philips Semiconductors Product data sheet
SC28L91
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
2004 Oct 21
11
DC ELECTRICAL CHARACTERISTICS
1,
2,
3
V
CC
= 3.3 V ± 10 %, T
amb
= –40 °C to +85 °C, unless otherwise specified.
Symbol
Parameter Conditions Min Typ Max Unit
V
IL
Input low voltage 0.65 0.2*V
CC
V
V
IH
Input high voltage 0.8*V
CC
1.7 V
V
OL
Output low voltage
I
OL
= 2.4 mA
0.2 0.4 V
V
OH
Output high voltage (except OD outputs)
4
I
OH
= –400 µA
V
CC
– 0.5 V
CC
– 0.2 V
I
IX1PD
X1/CLK input current - power down
V
IN
= 0 V to V
CC
–0.5 0.05 +0.5 µA
I
ILX1
X1/CLK input low current - operating V
IN
= 0 V –80 0 µA
I
IHX1
X1/CLK input high current - operating V
IN
= V
CC
0 80 µA
Input leakage current:
I
I
All except input port pins V
IN
= 0 V to V
CC
–0.5 0.05 +0.5 µA
Input port pins
5
V
IN
= 0 V to V
CC
–8 0.5 +0.5 µA
I
OZH
Output off current high, 3-State data bus V
IN
= V
CC
0.5 µA
I
OZL
Output off current low, 3-State data bus V
IN
= 0 V –0.5 µA
I
ODL
Open-drain output low current in off-state V
IN
= 0 V –0.5 µA
I
ODH
Open-drain output high current in off-state V
IN
= V
CC
0.5 µA
Power supply current
6
I
CC
Operating mode CMOS input levels 5 mA
Power down mode CMOS input levels 1 5.0
mA
NOTES:
1. Parameters are valid over specified temperature and voltage range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of
5 ns maximum. For X1/CLK, this swing is between 0.4 V and 0.8*V
CC
. All time measurements are referenced at input voltages of 0.8 V and
2.0 V and output voltages of 0.8 V and 2.0 V, as appropriate.
3. Typical values are at +25 °C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: C
L
= 125 pF, except open drain outputs. Test conditions for open drain outputs: C
L
= 125 pF,
constant current source = 2.6 mA.
5. Input port pins have active pull-up transistors that will source a typical 2 µA from V
CC
when the input pins are at V
SS
.
Input port pins at V
CC
source 0.0 µA.
6. All outputs are disconnected. Inputs are switching between CMOS levels of V
CC
– 0.2 V and V
SS
+ 0.2 V.
Philips Semiconductors Product data sheet
SC28L91
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
2004 Oct 21
12
AC CHARACTERISTICS (5 VOLT)
1,
2,
3,
4
V
CC
= 5.0 V ± 10 %, T
amb
= –40 °C to +85 °C, unless otherwise specified.
Symbol Parameter Min Typ Max Unit
Reset Timing (See Figure 4)
t
RES
Reset pulse width 100 18 ns
Bus Timing
5
(See Figure 5)
t
*AS
A0–A3 setup time to RDN, WRN Low 10 6 ns
t
*AH
A0–A3 hold time from RDN, WRN low 20 12 ns
t
*CS
CEN setup time to RDN, WRN low 0 ns
t
*CH
CEN Hold time from RDN. WRN low 0 ns
t
*RW
WRN, RDN pulse width (Low time) 15 8 ns
t
*DD
Data valid after RDN low (125pF load. See Figure 3 for smaller loads.) 40 55 ns
t
*DA
RDN low to data bus active
6
0 ns
t
*DF
Data bus floating after RDN or CEN high 20 ns
t
*DI
RDN or CEN high to data bus invalid
7
0 ns
t
*DS
Data bus setup time before WRN or CEN high (write cycle) 25 ns
t
*DH
Data hold time after WRN high 0 –12 ns
t
*RWD
High time between read and/or write cycles
5,
7
17 ns
Port Timing
5
(See Figure 9)
t
*PS
Port in setup time before RDN low (Read IP ports cycle) 0 –20 ns
t
*PH
Port in hold time after RDN high 0 –20 ns
t
*PD
OP port valid after WRN or CEN high (OPR write cycle) 40 60 ns
Interrupt Timing (See Figure 10)
t
*IR
INTRN (or OP3–OP7 when used as interrupts) negated from:
Read RxFIFO (RxRDY/FFULL interrupt) 40 60 ns
Write TxFIFO (TxRDY interrupt) 40 60 ns
Reset Command (delta break change interrupt) 40 60 ns
Stop C/T command (Counter/timer interrupt 40 60 ns
Read IPCR (delta input port change interrupt) 40 60 ns
Write IMR (Clear of change interrupt mask bit(s)) 40 60 ns
Clock Timing (See Figure 11)
t
*CLK
X1/CLK high or low time 30 20 ns
f
*CLK
X1/CLK frequency
8
(for higher speeds contact factory) 0.1 3.686 8.0 MHz
f
*CTC
C/T Clk (IP2) high or low time (C/T external clock input) 30 10 ns
f
*CTC
C/T Clk (IP2) frequency
8
(for higher speeds contact factory) 0 8.0 MHz
t
*RX
RxC high or low time (16X) 30 10 ns
f
*RX
RxC Frequency (16X)(for higher speeds contact factory) 0 16 MHz
RxC Frequency (1x)
8,
9
0 1 MHz
t
*TX
TxC High or low time (16X) 30 10 ns
f
*TX
TxC frequency (16X) (for higher speeds contact factory) 16 MHz
TxC frequency (1X)
8,
9
0 1 MHz
Transmitter Timing, external clock (See Figure 12)
t
*TXD
TxD output delay from TxC low (TxC input pin) 40 60 ns
t
*TCS
Output delay from TxC output pin low to TxD data output 6 30 ns

SC28L91A1B,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC 3V-5V 1CH UART INTEL/MOT INTRF
Lifecycle:
New from this manufacturer.
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