ADV7401
Rev. B | Page 3 of 20
FUNCTIONAL BLOCK DIAGRAM
FIELD/DE
LLC1
P29–P22
P19–P12
P9–P2
PIXEL
DATA
INPUT
MUX
DATA
PREPROCESSOR
DECIMATION
AND
DOWNSAMPLING
FILTERS
STANDARD DEFINITION PROCESSOR
LUMA
FILTER
OUTPUT FIFO AND FORMATTER
AIN1
TO
AIN12
ADV7401
SERIAL INTERFACE
CONTROL AND VBI DATA
SCLK
SDA
ALSB
SYNC
EXTRACT
16
HS
8
8
VS
SFL/
SYNCOUT
CVBS
S-VIDEO
YPrPb
SCART–
(RGB + CVBS)
GRAPHICS RGB
INT
12
CHROMA
FILTER
CHROMA
DEMOD
F
SC
RECOVERY
LUMA
RESAMPLE
LUMA
2D COMB
(5H MAX)
RESAMPLE
CONTROL
CHROMA
RESAMPLE
CHROMA
2D COMB
(4H MAX)
FAST
BLANK
OVERLAY
CONTROL
AND
AV CODE
INSERTION
FB
Y
Cb
Cr
VBI DATA RECOVERY
MACROVISION
DETECTION
STANDARD
AUTODETECTION
CVBS/Y
C
Cb
Cr
Cb
Y
COLORSPACE
CONVERSION
CVBS
Cr
8
COMPONENT PROCESSOR
SCLK2
SDA2
SSPD
STDI
SYNC PROCESSING AND
CLOCK GENERATION
DCLK_IN
DE_IN
HS_IN
VS_IN
SOG
SOY
DIGITAL INPUT
PORT
DVI or HDMI
XTAL
XTAL1
24
8
8
8
DIGITAL
FINE
CLAMP
GAIN
CONTROL
OFFSET
CONTROL
AV CODE
INSERTION
24
10
10
10
10
10
10
10
ACTIVE PEAK
AND
AGC
MACROVISION
DETECTION
CGMS DATA
EXTRACTION
P40–P31
P29–P20
P11–P10
P1–P0
10
A/DCLAMP
ANTI-
ALIAS
FILTER
10
A/DCLAMP
ANTI-
ALIAS
FILTER
10
A/DCLAMP
ANTI-
ALIAS
FILTER
10
A/D
ANTI-
ALIAS
FILTER
CLAMP
05340-001
Figure. 1.
ADV7401
Rev. B | Page 4 of 20
ELECTRICAL CHARACTERISTICS
@ AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V, nominal input range 1.6 V.
Operating temperature range, unless otherwise noted.
Table 1.
Parameter
1, 2, 3
Symbol Test Conditions Min Typ Max Unit
STATIC PERFORMANCE
4, 5
Resolution (each ADC) N 10 Bits
Integral Nonlinearity INL BSL at 27 MHz (at a 10-bit level) ±0.6 ±2.5 LSB
Integral Nonlinearity INL BSL at 54 MHz (at a 10-bit level) −0.6/+0.7 LSB
Integral Nonlinearity INL BSL at 74 MHz (at a 10-bit level) ±1.4 LSB
Integral Nonlinearity INL BSL at 110 MHz (at an 8-bit level)
6
±0.9 LSB
Integral Nonlinearity INL BSL at 135 MHz (at an 8-bit level)
7
±1.5 LSB
Differential Nonlinearity DNL At 27 MHz (at a 10-bit level) −0.2/+0.25 −0.99/+2.5 LSB
Differential Nonlinearity DNL At 54 MHz (at a 10-bit level) −0.2/+0.25 LSB
Differential Nonlinearity DNL At 74 MHz (at a 10-bit level) ±0.9 LSB
Differential Nonlinearity DNL At 110 MHz (at an 8-bit level)
6
−0.2/+1.5 LSB
Differential Nonlinearity DNL At 135 MHz (at an 8-bit level)
7
−0.9/+3.0 LSB
DIGITAL INPUTS
8
Input High Voltage
9
V
IH
2 V
Input Low Voltage
10
V
IL
0.8 V
Input High Voltage V
IH
HS_IN, VS_IN low trigger mode 0.7 V
Input Low Voltage V
IL
HS_IN, VS_IN low trigger mode 0.3 V
Input Current I
IN
Pins listed in Note 11 −60 +60 μA
All other input pins −10 +10 μA
Input Capacitance
8
C
IN
10 pF
DIGITAL OUTPUTS
Output High Voltage
12
V
OH
I
SOURCE
= 0.4 mA 2.4 V
Output Low Voltage
12
V
OL
I
SINK
= 3.2 mA 0.4 V
High Impedance Leakage Current I
LEAK
Pins listed in Note 13 60 μA
All other output pins 10 μA
Output Capacitance
8
C
OUT
20 pF
POWER REQUIREMENTS
8
Digital Core Power Supply DVDD 1.65 1.8 2 V
Digital I/O Power Supply DVDDIO 3.0 3.3 3.6 V
PLL Power Supply PVDD 1.71 1.8 1.89 V
Analog Power Supply AVDD 3.15 3.3 3.45 V
Digital Core Supply Current IDVDD CVBS input sampling at 54 MHz 105 mA
Graphics RGB sampling at 135 MHz 137 mA
SCART RGB FB sampling at 54 MHz 106 mA
Digital I/O Supply Current IDVDDIO CVBS input sampling at 54 MHz 4 mA
Graphics RGB sampling at 135 MHz 19 mA
PLL Supply Current IPVDD CVBS input sampling at 54 MHz 11 mA
Graphics RGB sampling at 135 MHz 12 mA
Analog Supply Current
14
IAVDD CVBS input sampling at 54 MHz 99 mA
Graphics RGB sampling at 135 MHz 242 mA
SCART RGB FB sampling at 54 MHz 269 mA
Power-Down Current IPWRDN 2.25 mA
Green Mode Power-Down IPWRDNG Sync bypass function 16 mA
Power-Up Time TPWRUP 20 ms
1
The min/max specifications are guaranteed over this range.
2
Temperature range T
MIN
to T
MAX
: 40°C to +85°C (0°C to 70°C temperature range for ADV7401KSTZ-140).
ADV7401
Rev. B | Page 5 of 20
3
All specifications obtained using programming scripts with the following sequence included: Addr 0x0E - data 0x80, Addr 0x54 - data 0x00, Addr 0x0E - data 0x00.
4
All ADC linearity tests performed at input range of full scale – 12.5%, and at zero scale + 12.5%.
5
Max INL and DNL specifications obtained with part configured for component video input.
6
Specification for ADV7401BSTZ-110 and ADV7401KSTZ-140 only.
7
Specification for ADV7401KSTZ-140 only.
8
Guaranteed by characterization.
9
To obtain specified V
IH
level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
IH
on Pin 38 = 1.2 V.
10
To obtain specified V
IL
level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
IL
on Pin 38 = 0.4 V.
11
Pins 1, 2, 13, 14, 16, 19, 24, 29, 30, 31, 32, 33, 34, 35, 45, 79, 83, 84, 87, 88, 95, 96, 97, 100.
12
V
OH
and V
OL
levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
13
Pins 3, 13, 14, 19, 24, 29, 30, 31, 32, 33, 34, 45.
14
Analog current measurements for CVBS made with ADC0 powered up only, For RGB, ADC0, ADC1 and ADC2 powered up only, for SCART FB, all ADCs powered up.

ADV7401BSTZ-110

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Video ICs 10B Intg Multiformat SDTV/HDTV Decoder
Lifecycle:
New from this manufacturer.
Delivery:
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