WM1824B Production Data
w
PD, Rev 4.0, November 2012
16
POWER UP AND DOWN CONTROL
The MCLK, BCLK and MUTE¯¯¯¯¯ pins are monitored to control how the device powers up or
down, and this is summarised in Figure 8 below.
Off
Standby
Enabled
BCLK Enabled
MUTE=1
MUTE=0
BCLK
Disabled
MCLK
Disabled
MCLK Enabled
BCLK Enabled
MUTE=0
MCLK Enabled
BCLK Enabled
MUTE=1
MCLK
Disabled
Figure 8 Hardware Power Sequence Diagram
Off to Enable
To power up the device to enabled, start MCLK and BCLK and set MUTE¯¯¯¯¯ = 1.
Off to Standby
To power up the device to standby, start MCLK and BCLK and set MUTE¯¯¯¯¯ = 0. Once the
device is in standby mode, BCLK can be disabled and the device will remain in standby
mode.
Standby to Enable
To transition from the standby state to the enabled state, set the MUTE¯¯¯¯¯ pin to logic 1 and
start BCLK.
Enable to Standby
To power down to a standby state leaving the charge pump running, either set the MUTE¯¯¯¯¯
pin to logic 0 or stop BCLK. MCLK must continue to run in these situations. The device
will automatically mute and power down quietly in either case.
Note: It is recommended that the device is placed in standby mode before sample rate change if the sample rate
changes more than once in 1026 LRCLK periods, as detailed in Digital Audio Data Sampling Rates on page 14.
Enable to Off
To power down the device completely, stop MCLK at any time. It is recommended that
the device is placed into standby mode as described above before stopping MCLK to
allow a quiet shutdown.
For the timing of the off state to enabled state transition (power on to audio out timing),
and the enabled state to standby state transition (the shutdown timing), please refer to
WTN0302.
