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IR3506MTRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
IR3506
Page 4 of 21 V3.02
PARAMETER TEST CONDITION MIN TYP MAX UNIT
PWM Comparator
PWM Ramp Slope V(VCCL) = 6.8 V
46
53
63
mV/
%DC
EAIN Bias Current 0 ≤ EAIN ≤ 3V -5
-0.3 5
µA
Minimum Pulse Width Note 1 55 70 ns
Current Sense Amplifier
CSIN+/- Bias Current -200 0 200 nA
CSIN+/- Bias Current
Mismatch
Note 1 -50 0 50 nA
Input Offset Voltage CSIN+ = CSIN- = DACIN. Measure
input referred offset from DACIN
-1 0 1 mV
Gain 0.5V ≤ V(DACIN) < 1.6V 30 32.5 35 V/V
Unity Gain Bandwidth C(IOUT)=10pF. Measure at IOUT.
Note 1
4.8 6.8 8.8 MHz
Slew Rate 6
V/µs
Differential Input Range 0.8V ≤ V(DACIN) ≤ 1.6V, Note 1 -10 50 mV
Differential Input Range 0.5V ≤ V(DACIN) < 0.8V, Note 1 -5 50 mV
Common Mode Input Range Note 1 0
VCCL-
2.5V
V
Rout at T
J
= 25
o
C Note 1 2.3 3.0 3.7 kΩ
Rout at T
J
= 125
o
C 3.6 4.7 5.4 kΩ
IOUT Source Current 0.500 1.6 2.9 mA
IOUT Sink Current 0.500 1.4 2.9 mA
Share Adjust Amplifier
Input Offset Voltage Note 1 -3 0 3 mV
Gain CSIN+ = CSIN- = DACIN. Note 1 3.6 4.7 6.0 V/V
Unity Gain Bandwidth Note 1 4 8.5 17 kHz
PWM Ramp Floor Voltage IOUT unconnected
Measured Relative to DACIN
-116 0 +116 mV
Maximum PWM Ramp Floor
Voltage
IOUT = DACIN - 200mV
Measured relative to FLOOR voltage.
120
180
240
mV
Minimum PWM Ramp Floor
Voltage
IOUT = DACIN + 200mV
Measured relative to FLOOR voltage
-220
-160
-100
mV
PSI Comparator
Rising Threshold Voltage Note 1 520 620 700 mV
Falling Threshold Voltage Note 1 400 550 650 mV
Hysteresis Note 1 50 70 120 mV
Resistance 200 500 850 kΩ
Floating Voltage 800 1150 mV
IR3506
Page 5 of 21 V3.02
Note 1: Guaranteed by design, but not tested in production
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Diode Emulation Preset Comparator
Threshold Voltage Step V(IOUT) up until GATEL drives
high. Compare to V(VCCL)
-1.0 -0.8 -0.4 V
75 % Regulation Comparator
Threshold Voltage The ratio of V(CSIN-) / V(DACIN), above
which diode emulation cannot occur.
63 74 85 %
Negative Current Comparator
Input Offset Voltage Note 1 -16 0 16 mV
Propagation Delay Time Step V(CSIN+) – V(CSIN-) from positive
to negative while V(IOUT) = VCCL.
Measure time to V(GATEL) < 1V.
30 200 380 ns
Bootstrap Diode
Forward Voltage I(BOOST) = 30mA, VCCL=6.8V 360 520 960 mV
Debug Comparator
Threshold Voltage Compare to V(VCCL) -1.6 -1.4 -1.2 V
General
VCCL Supply Current 4.2 10 16.1 mA
BOOST Supply Current 4.75V ≤ V
(
BOOST)-V(SW) ≤ 8V
0.5 1.5 3
mA
DACIN Bias Current
-1.5 -0.75 1
µA
SW Floating Voltage
0.1 0.3 0.4
mA
IR3506
Page 6 of 21 V3.02
PIN DESCRIPTION
PIN# PIN SYMBOL PIN DESCRIPTION
1 IOUT Output of the Current Sense Amplifier is connected to this pin through a 3kΩ
resistor. Voltage on this pin is equal to V(DACIN) + 32.5 [V(CSIN+) – V(CSIN-)].
Connecting all IOUT pins together, a share bus is implemented, which provides an
indication of the average current being supplied by all the phases. The Control IC,
for voltage positioning and over-current protection, uses this signal. OVP mode is
initiated if the voltage on this pin rises above V(VCCL)- 0.8V.
2 DACIN Reference voltage input from the Control IC. The Current Sense signal and PWM
ramp are referenced to the voltage on this pin.
3 LGND Ground for internal IC circuits. IC substrate is connected to this pin.
4 PHSIN Phase clock input.
5 PHSOUT Phase clock output.
6 CLKIN Clock input.
7 PGND Return for low side driver and reference for GATEH non-overlap comparator.
8 GATEL Low-side driver output and input to GATEH non-overlap comparator.
9 VCCL Supply for low-side driver. Internal bootstrap synchronous PFET is connected from
this pin to the BOOST pin.
10 BOOST Supply for high-side driver. Internal bootstrap synchronous PFET is connected
between this pin and the VCCL pin.
11 GATEH High-side driver output and input to GATEL non-overlap comparator.
12 SW Return for high-side driver and reference for GATEL non-overlap comparator.
13 PSI Logic low is an active low (i.e. low = low power state).
14 CSIN+ Non-Inverting input to the current sense amplifier and input to debug comparator.
15 CSIN- Inverting input to the current sense amplifier and input to synchronous rectification
disable comparator.
16 EAIN PWM comparator input from the error amplifier output of Control IC.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

IR3506MTRPBF

Mfr. #:
Buy IR3506MTRPBF
Manufacturer:
Infineon Technologies
Description:
Power Management Specialized - PMIC XPHASE3 DDR VTT 7V 2A 3 Wire
Lifecycle:
New from this manufacturer.
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