MT47H512M8WTR-25E:C TR

Figure 3: 32 Meg x 8 x 8 Banks x 2 Ranks
CS0#
CKE0
ODT0
CS1#
CKE1
ODT1
CAS#
RAS#
WE#
CK
CK#
DQ[7:0]
DQS, DQS#, RDQS, RDQS#
DM
A[14:0]
BA[2:0]
Rank 0
(32 Meg x 8 x 8 banks)
Rank 1
(32 Meg x 8 x 8 banks)
4Gb: x4, x8 TwinDie DDR2 SDRAM
Functional Block Diagrams
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mt47h1g_64m_32m_twindie.pdf - Rev. I 01/14 EN
7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2006 Micron Technology, Inc. All rights reserved.
Electrical Specifications – Absolute Ratings
Stresses greater than those listed may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other condi-
tions oustide those indicated in the operational sections of this specification is not im-
plied. Exposure to absolute maximum rating conditions for extended periods may ad-
versely affect reliability.
Table 4: Absolute Maximum DC Ratings
Parameter Symbol Min Max Units Notes
V
DD
supply voltage relative to V
SS
V
DD
1.0 2.3 V 1
V
DDQ
supply voltage relative to V
SSQ
V
DDQ
0.5 2.3 V 1, 2
V
DDL
supply voltage relative to V
SSL
V
DDL
0.5 2.3 V 1
Voltage on any ball relative to V
SS
V
IN
, V
OUT
0.5 2.3 V 3
Input leakage current; any input 0V V
IN
V
DD
;
all other balls not under test = 0V
I
I
10 10 µA
Output leakage current; 0V V
OUT
V
DDQ
; DQ
and ODT disabled
I
OZ
10 10 µA
V
REF
leakage current; V
REF
= valid V
REF
level I
VREF
4 4 µA
Notes:
1. V
DD
, V
DDQ
, and V
DDL
must be within 300mV of each other at all times; this is not re-
quired when power is ramping down.
2. V
REF
0.6 x V
DDQ
; however, V
REF
may be V
DDQ
provided that V
REF
300mV.
3. Voltage on any I/O may not exceed voltage on V
DDQ
.
Temperature and Thermal Impedance
It is imperative that the DDR2 SDRAM device’s temperature specifications, shown in
the following table, be maintained in order to ensure the junction temperature is in the
proper operating range to meet data sheet specifications. An important step in main-
taining the proper junction temperature is using the device’s thermal impedances cor-
rectly. The thermal impedances are listed in Table 6 (page 9)for the applicable and
available die revision and packages.
Incorrectly using thermal impedances can produce significant errors. Read Micron
technical note TN-00-08, “Thermal Applications,” prior to using the thermal impedan-
ces listed below. For designs that are expected to last several years and require the flexi-
bility to use several DRAM die shrinks, consider using final target theta values (rather
than existing values) to account for increased thermal impedances from the die size re-
duction.
The DDR2 SDRAM device’s safe junction temperature range can be maintained when
the T
C
specification is not exceeded. In applications where the device’s ambient tem-
perature is too high, use of forced air and/or heat sinks may be required in order to sat-
isfy the case temperature specifications.
4Gb: x4, x8 TwinDie DDR2 SDRAM
Electrical Specifications – Absolute Ratings
PDF: 09005aef8227ee4d
mt47h1g_64m_32m_twindie.pdf - Rev. I 01/14 EN
8
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2006 Micron Technology, Inc. All rights reserved.
Table 5: Temperature Limits
Parameter Symbol Min Max Units Notes
Storage temperature T
STG
–55 150 °C 1
Operating temperature: commercial T
C
0 85 °C 2, 3
Notes:
1. MAX storage case temperature T
STG
is measured in the center of the package, as shown
in the figure below. This case temperature limit is allowed to be exceeded briefly during
package reflow, as noted in Micron technical note TN-00-15, “Recommended Soldering
Parameters.”
2. MAX operating case temperature T
C
is measured in the center of the package, as shown
below.
3. Device functionality is not guaranteed if the device exceeds maximum T
C
during
operation.
Figure 4: Example Temperature Test Point Location
Test point
Lmm x Wmm FGBA
0.5 (W)
0.5 (L)
Length (L)
Width (W)
Table 6: Thermal Impedance
Die
Revision Package Substrate
Θ JA (°C/W)
Airflow =
0m/s
Θ JA (°C/W)
Airflow =
1m/s
Θ JA (°C/W)
Airflow =
2m/s Θ JB (°C/W) Θ JC (°C/W) Notes
C 63-ball 2-layer 62.6 45.3 39.2 28.5 3.5 1
4-layer 45.8 36.5 32.9 28.1
Note:
1. Thermal resistance data is based on a number of samples from multiple lots and should
be viewed as a typical number.
4Gb: x4, x8 TwinDie DDR2 SDRAM
Electrical Specifications – Absolute Ratings
PDF: 09005aef8227ee4d
mt47h1g_64m_32m_twindie.pdf - Rev. I 01/14 EN
9
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2006 Micron Technology, Inc. All rights reserved.

MT47H512M8WTR-25E:C TR

Mfr. #:
Manufacturer:
Micron
Description:
IC DRAM 4G PARALLEL 63FBGA
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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