FDM606P Datasheet FDM606P | P7-P9

FDM606P

Thermal Resistance vs. Mounting Pad Area

The maximum rated junction temperature, T

, and the

thermal resistance of the heat dissipating path determines

the maximum allowable device power dissipation, P

, in an

application. Therefore the application’s ambient

temperature, T

(

C), and thermal resistance R

θJA

(

C/W)

must be reviewed to ensure that T

is never exceeded.

Equation 1 mathematically represents the relationship and

serves as the basis for establishing the rating of the part.

In using surface mount devices such as the MicroFET

package, the environment in which it is applied will have a

significant influence on the part’s current and maximum

power dissipation ratings. Precise determination of P

complex and influenced by many factors:

1. Mounting pad area onto which the device is attached and

whether there is copper on one side or both sides of the

board.

2. The number of copper layers and the thickness of the

board.

3. The use of external heat sinks.

4. The use of thermal vias.

5. Air flow and board orientation.

6. For non steady state applications, the pulse width, the

duty cycle and the transient thermal response of the part,

the board and the environment they are in.

Fairchild provides thermal information to assist the

designer’s preliminary application evaluation. Figure 18

defines the R

θJA

for the device as a function of the top

copper (component side) area. This is for a horizontally

positioned FR-4 board with 1oz copper after 1000 seconds

of steady state power with no air flow. This graph provides

the necessary information for calculation of the steady state

junction temperature or power dissipation. Pulse

applications can be evaluated using the Fairchild device

Spice thermal model or manually utilizing the normalized

maximum transient thermal impedance curve.

Thermal resistances corresponding to other copper areas

can be obtained from Figure 18 or by calculation using

Equation 2. The area, in square inches is the top copper

area including the gate and source pads.

(EQ. 1)

–()

θJA

-----------------------------=

(EQ. 2)

θJA

58.9

6.8

0.041 Area+()

-------------------------------------+=

100

150

200

250

0.001 0.01 0.1 1 10

Figure 18. Thermal Resistance vs Mounting

Pad Area

θJA

= 58.9 + 6.8/(0.041+Area)

θJA

(

C/W)

AREA, TOP COPPER AREA (in

)

FDM606P

PSPICE Electrical Model

.SUBCKT FDM606P 2 1 3 ; rev Oct. 2001

CA 12 8 18.3e-10

CB 15 14 18.3e-10

CIN 6 8 19.8e-10

DBODY 5 7 DBODYMOD

DBREAK 7 11 DBREAKMOD

DPLCAP 10 6 DPLCAPMOD

EBREAK 5 11 17 18 -23.4

EDS 14 8 5 8 1

EGS 13 8 6 8 1

ESG 5 10 8 6 1

EVTHRES 6 21 19 8 1

EVTEMP 6 20 18 22 1

IT 8 17 1

LDRAIN 2 5 1e-9

LGATE 1 9 1.1e-9

LSOURCE 3 7 0.78e-9

MMED 16 6 8 8 MMEDMOD

MSTRO 16 6 8 8 MSTROMOD

MWEAK 16 21 8 8 MWEAKMOD

RBREAK 17 18 RBREAKMOD 1

RDRAIN 50 16 RDRAINMOD 8.5e-3

RGATE 9 20 16

RLDRAIN 2 5 10

RLGATE 1 9 11

RLSOURCE 3 7 7.8

RSLC1 5 51 RSLCMOD 1e-6

RSLC2 5 50 1e3

RSOURCE 8 7 RSOURCEMOD 11e-3

RVTHRES 22 8 RVTHRESMOD 1

RVTEMP 18 19 RVTEMPMOD 1

S1A 6 12 13 8 S1AMOD

S1B 13 12 13 8 S1BMOD

S2A 6 15 14 13 S2AMOD

S2B 13 15 14 13 S2BMOD

VBAT 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*97),2.5))}

.MODEL DBODYMOD D (IS = 8e-11 N=1.07 RS = 1.3e-2 TRS1 = 1e-3 TRS2 = 1e-6 XTI=0 IKF=0.2 CJO = 5.9e-10 TT = 14.5e-9

M = 0.47)

.MODEL DBREAKMOD D (RS = 5.3e-1 TRS1 = 5.5e-3 TRS2 = -9e-5)

.MODEL DPLCAPMOD D (CJO = 9.4e-10 IS = 1e-30 N = 10 M = 0.73)

.MODEL MMEDMOD PMOS (VTO = -0.96 KP = 1.3 IS=1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 16)

.MODEL MSTROMOD PMOS (VTO = -1.22 KP = 54 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)

.MODEL MWEAKMOD PMOS (VTO = -0.8 KP = 0.05 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 160 RS = 0.1)

.MODEL RBREAKMOD RES (TC1 = 7e-4 TC2 = -1e-7)

.MODEL RDRAINMOD RES (TC1 = 1.5e-3 TC2 = 4.9e-6)

.MODEL RSLCMOD RES (TC1 = 3.7e-3 TC2 = 7.8e-6)

.MODEL RSOURCEMOD RES (TC1 = 3e-3 TC2 = 5.2e-6)

.MODEL RVTHRESMOD RES (TC1 = 1.2e-3 TC2 = 1.2e-6)

.MODEL RVTEMPMOD RES (TC1 = -6.4e-4 TC2 = -1e-9)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.0 VOFF= 1.0)

.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.0 VOFF= 3.0)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -0.3)

.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.3 VOFF= 0.5)

.ENDS

Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank

Wheatley.

GATE

RGATE

EVTEMP

S1A

S1B

S2A

S2B

EGS

EDS

CIN

MWEAK

RDRAIN

DBREAK

EBREAK

DBODY

DRAIN

RSOURCE

SOURCE

RBREAK

RVTEMP

VBAT

EVTHRES

ESG

DPLCAP

ESLC

RSLC1

RSLC2

MMED

MSTRO

RVTHRES

LSOURCE

RLSOURCE

LDRAIN

RLDRAIN

LGATE

RLGATE

FDM606P

SABER Electrical Model

REV October 2001

template fdm606p n2,n1,n3

electrical n2,n1,n3

{

var i iscl

dp..model dbodymod = (isl = 8.0e-11, nl=1.07, rs = 1.3e-2, trs1 = 1e-3, trs2 = 1e-6, xti=0, cjo = 5.9e-10, ikf=0.2, tt = 14.5e-9, m = 0.47)

dp..model dbreakmod = (rs = 5.3e-1, trs1 = 5.5e-3, trs2 = -9.0e-5)

dp..model dplcapmod = (cjo = 9.4e-10, isl=10e-30, nl=10, m=0.73)

m..model mmedmod = (type=_p, vto = -0.96, kp=1.3, is=1e-30, tox=1)

m..model mstrongmod = (type=_p, vto = -1.22, kp = 54, is = 1e-30, tox = 1)

m..model mweakmod = (type=_p, vto = -0.8, kp = 0.05, is = 1e-30, tox = 1, rs=0.1)

sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = 3.0, voff = 1.0)

sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = 1.0, voff = 3.0)

sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = -0.3)

sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = -0.3, voff = 0.5)

c.ca n12 n8 = 18.3e-10

c.cb n15 n14 = 18.3e-10

c.cin n6 n8 = 19.8e-10

dp.dbody n5 n7 = model=dbodymod

dp.dbreak n7 n11 = model=dbreakmod

dp.dplcap n10 n6 = model=dplcapmod

i.it n8 n17 = 1

l.ldrain n2 n5 = 1e-9

l.lgate n1 n9 = 1.1e-9

l.lsource n3 n7 = 0.78e-9

m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u

m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u

res.rbreak n17 n18 = 1, tc1 = 7e-4, tc2 = -1e-7

res.rdrain n50 n16 = 8.5e-3, tc1 = 1.5e-3, tc2 = 4.9e-6

res.rgate n9 n20 = 16

res.rldrain n2 n5 = 10

res.rlgate n1 n9 = 11

res.rlsource n3 n7 = 7.8

res.rslc1 n5 n51= 1e-6, tc1 = 3.7e-3, tc2 =7.8e-6

res.rslc2 n5 n50 = 1e3

res.rsource n8 n7 = 11e-3, tc1 = 3e-3, tc2 =5.2e-6

res.rvtemp n18 n19 = 1, tc1 = -6.4e-4, tc2 = -1e-9

res.rvthres n22 n8 = 1, tc1 = 1.2e-3, tc2 = 1.2e-6

spe.ebreak n5 n11 n17 n18 = -23.4

spe.eds n14 n8 n5 n8 = 1

spe.egs n13 n8 n6 n8 = 1

spe.esg n5 n10 n6 n8 = 1

spe.evtemp n20 n6 n18 n22 = 1

spe.evthres n6 n21 n19 n8 = 1

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc=1

equations {

i (n51->n50) +=iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/97))** 2.5))

}

GATE

RGATE

EVTEMP

S1A

S1B

S2A

S2B

EGS

EDS

CIN

MWEAK

RDRAIN

DBREAK

EBREAK

DBODY

DRAIN

RSOURCE

SOURCE

RBREAK

RVTEMP

VBAT

EVTHRES

ESG

DPLCAP

ISCL

RSLC1

RSLC2

MMED

MSTRO

RVTHRES

LSOURCE

RLSOURCE

LDRAIN

RLDRAIN

LGATE

RLGATE

P1-P3 P4-P6 P7-P9 P10-P12

FDM606P

Mfr. #:

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Manufacturer:

ON Semiconductor / Fairchild

Description:

MOSFET P-Ch Power Trench Logic Level 1.8V

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FDM606P