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ML610Q438P-NNNTC0AGL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
FEDL610Q439-3
LAPIS Semiconductor
ML610Q438/ML610Q439
28/36
MEASURING CIRCUIT 3
MEASURING CIRCUIT 4
MEASURING CIRCUIT 5
Input pins
A
V
DD
AV
DD
V
REF
V
DDL
V
DDX
V
L1
V
L2
V
L3
V
L4
V
SS
AV
SS
VIH
VIL
Output pins
*1: Input logic circuit to determine the specified measuring conditions.
*2: Measured at the specified output pins.
(*2)
RS1
Input pins
A
V
DD
AV
DD
V
REF
V
DDL
V
DDX
V
L1
V
L2
V
L3
V
L4
V
SS
AV
SS
Output pins
*3: Measured at the specified output pins.
(*3)
Input pins
V
DD
AV
DD
V
REF
V
DDL
V
DDX
V
L1
V
L2
V
L3
V
L4
V
SS
AV
SS
VIH
VIL
Output pins
*1: Input logic circuit to determine the specified measuring conditions.
(*1)
Waveform monitoring
FEDL610Q439-3
LAPIS Semiconductor
ML610Q438/ML610Q439
29/36
AC CHARACTERISTICS (External Interrupt)
(V
DD
= 1.1 to 3.6V, AV
DD
= 2.2 to 3.6V, V
SS
= AV
SS
= 0V, Ta = 20 to +70C, Ta = 40 to +85C for P version,
unless otherwise specified)
Rating
Parameter Symbol Condition
Min. Typ. Max.
Unit
External interrupt disable period
T
NUL
Interrupt: Enabled (MIE = 1),
CPU: NOP operation
System clock: 32.768kHz
76.8  106.8 s
AC CHARACTERISTICS (UART)
(V
DD
= 1.1 to 3.6V, AV
DD
= 2.2 to 3.6V, V
SS
= AV
SS
= 0V, Ta = 20 to +70C, Ta = 40 to +85C for P version,
unless otherwise specified)
Rating
Parameter Symbol Condition
Min. Typ. Max.
Unit
Transmit baud rate
t
TBRT
  BRT*
1
 s
Receive baud rate
t
RBRT

BRT*
1
3%
BRT*
1
BRT*
1
+3%
s
*1: Baud rate period (including the error of the clock frequency selected) set with the UART baud rate register (UA0BRTL,H)
and the UART mode register 0 (UA0MOD0).
t
RBRT
TXD0*
RXD0*
*: Indicates the secondary function of the port.
t
TBRT
t
NUL
P00–P07
(Rising-edge interrupt)
P00–P07
(Falling-edge interrupt)
NMI, P00–P07
(Both-edge interrupt)
t
NUL
t
NUL
FEDL610Q439-3
LAPIS Semiconductor
ML610Q438/ML610Q439
30/36
AC CHARACTERISTICS (Synchronous Serial Port)
(V
DD
= 1.1 to 3.6V, AV
DD
= 2.2 to 3.6V, V
SS
= AV
SS
= 0V, Ta = 20 to +70C, Ta = 40 to +85C for P version,
unless otherwise specified)
Rating
Parameter Symbol Condition
Min. Typ. Max.
Unit
When high-speed oscillation is
not active
10   s
SCLK input cycle
(slave mode)
t
SCYC
When high-speed oscillation is
active (V
DD
= 1.8 to 3.6V)
1   s
SCLK output cycle
(master mode)
t
SCYC
  SCLK*
1
 s
When high-speed oscillation is
not active
4   s
SCLK input pulse width
(slave mode)
t
SW
When high-speed oscillation is
active (V
DD
= 1.8 to 3.6V)
0.4   s
SCLK output pulse width
(master mode)
t
SW

SCLK*
1
0.4
SCLK*
1
0.5
SCLK*
1
0.6
s
SOUT output delay time
(slave mode)
t
SD
   180 ns
SOUT output delay time
(master mode)
t
SD
   80 ns
SIN input
setup time
(slave mode)
t
SS
 80   ns
SIN input
setup time
(master mode)
t
SS
 180   ns
SIN input
hold time
t
SH
 80   ns
*1: Clock period selected with S0CK3–0 of the serial port 0 mode register (SIO0MOD1)
t
SD
SCLK0*
SIN0*
SOUT0*
*: Indicates the secondar
y
function of the
p
ort.
t
SD
t
SS
t
SH
t
SW
t
SW
t
SCYC
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

ML610Q438P-NNNTC0AGL

Mfr. #:
Buy ML610Q438P-NNNTC0AGL
Manufacturer:
ROHM Semiconductor
Description:
8-bit Microcontrollers - MCU RECOMMENDED ALT 755-10Q438PNNNTC0AAL
Lifecycle:
New from this manufacturer.
Delivery:
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