IDT 89HPES12NT12G2 Datasheet
10 of 32 December 16, 2013
Pin Characteristics
Note: Some input pads of the switch do not contain internal pull-ups or pull-downs. Unused SMBus and System inputs should be tied off to
appropriate levels. This is especially critical for unused control signal inputs which, if left floating, could adversely affect operation. Also, floating
pins can cause a slight increase in power consumption. Unused Serdes (Rx and Tx) pins should be left floating. Finally, No Connection pins
should not be connected.
Signal Type Name/Description
REFRES[6,4,1,0] — External Reference Resistor. Reference for the corresponding SerDes
bias currents and PLL calibration circuitry. A 3K Ohm +/- 1% resistor should
be connected from this pin to ground and isolated from any source of noise
injection. Each bit of this signal corresponds to a SerDes quad, e.g.,
REFRES[4] is the reference resistor for SerDes quad 4.
REFRESPLL — PLL External Reference Resistor. Provides a reference for the PLL bias
currents and PLL calibration circuitry. A 3K Ohm +/- 1% resistor should be
connected from this pin to ground and isolated from any source of noise
injection.
V
DD
CORE — Core V
DD.
Power supply for core logic (1.0V).
V
DD
I/O — I/O V
DD.
LVTTL I/O buffer power supply (3.3V).
V
DD
PEA — PCI Express Analog Power. Serdes analog power supply (1.0V).
V
DD
PEHA — PCI Express Analog High Power. Serdes analog power supply (2.5V).
V
DD
PETA — PCI Express Transmitter Analog Voltage. Serdes transmitter analog
power supply (1.0V).
V
SS
— Ground.
Table 9 Power, Ground, and SerDes Resistor Pins
Function Pin Name Type Buffer
I/O
Type
Internal
Resistor
1
Notes
PCI Express Interface PE00RN[0] I PCIe
differential
2
Serial Link Note: Unused SerDes
pins can be left floating
PE00RP[0] I
PE00TN[0] O
PE00TP[0] O
PE01RN[0] I
PE01RP[0] I
PE01TN[0] O
PE01TP[0] O
PE02RN[0] I
PE02RP[0] I
PE02TN[0] O
PE02TP[0] O
PE03RN[0] I
Table 10 Pin Characteristics (Part 1 of 3)
