HIP2103, HIP2104
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Ordering Information
PART NUMBER
(Notes 1, 2, 3, 4)
PART
MARKING
UVLO
(V)
VCC
REGULATOR
(V)
VDD
REGULATOR
(V)
PACKAGE
(Pb-Free)
PKG.
DWG. #
HIP2103FRTAAZ DZBF 4.0 N/A N/A 8 Ld 3x3 TDFN L8.3x3A
HIP2104FRAANZ 2104AN 4.0 3.3 12 12 Ld 4x4 DFN L12.4x4A
HIP2103-4DEMO1Z HIP2103, HIP2104 3-phase, Full, or Half Bridge Motor Drive Demonstration Board
HIP2103_4MBEVAL1Z HIP2103, HIP2104 Evaluation Board
NOTES:
1. Add “-T*”, suffix for tape and reel. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for HIP2103, HIP2104
. For more information on MSL, please see Technical
Brief TB363.
4. All part numbers are rated -40°C to +125°C for the recommended operating junction temperature range.
HIP2103, HIP2104
5
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Absolute Maximum Ratings (Note 5) Thermal Information
Supply Voltage V
DD
(HIP2103 only) . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Bridge Supply Voltage V
BAT
(HIP2104 Only) . . . . . . . . . . . . . . . -0.3V to 60V
High side Bias Voltage (V
HB -
V
HS)
(Note 10). . . . . . . . . . . . . . . -0.3V to 16V
Logic Inputs VCen, VDen (HIP2104 Only) . . . . . . . . . . - 0.3v to V
BAT
+ 0.3V
Logic Inputs LI, HI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3v to V
DD
+ 0.3V
Output Voltage LO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3V to V
DD
+ 0.3V
Output Voltage HO . . . . . . . . . . . . . . . . . . . . . . . . . . V
HS
- 0.3V to V
HB
+ 0.3V
Voltage on HS (Note 9, 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10V to 60V
Voltage on HB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
HS
- 0.3V to 66V
Average Current in Boot Diode (Note 6). . . . . . . . . . . . . . . . . . . . . . . 100mA
Maximum Boot Cap Value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µF
Average Output Current in HO and LO (Note 6) . . . . . . . . . . . . . . . . 200mA
ESD Ratings
Human Body Model Class 2 (Tested per JESD22-A114E) . . . . . . 2000V
Charged Device Model Class IV . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000V
Latch-Up (Tested per JESD-78B; Class 2, Level A) all pins. . . . . . . . 100mA
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
8 Ld DFN Package (Notes 7, 8). . . . . . . . . . 46 7
12 Ld TDFN Package (Notes 7, 8) . . . . . . . 44 7
Max Power Dissipation at +25°C in free air
8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3W
12 Ld TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2W
Max Power Dissipation at +25°C on copper plane
8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.3W
12 Ld TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.3W
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Maximum Operating Junction Temperature Range. . . . . . -40°C to +150°C
Nominal Over Temperature Shut-down . . . . . . . . . . . . . . . . . . . . . . .+155°C
Over Temperature Shut-down Range . . . . . . . . . . . . . . .+145°C to +165°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions (Note 5)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Supply Voltage, V
BAT
(HIP2104 only) (Note 11). . . . . . . . . . . . . 5.0V to 50V
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 14V
High Side Bias Voltage (V
HB -
V
HS)
(Note 10) . . . . . . . . . . . . . . -0.3V to 14V
Voltage on HS, Continuous, V
HS
(Notes 9, 10) . . . . . . . . . . . . . .-10V to 50V
Voltage on HB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
HS
- 0.3V to 60V
Logic Inputs VCen, VDen (HIP2104 only). . . . . . . . . . . . . . . . . . . .0V to V
BAT
Output Voltage (LO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V
DD
Output Voltage (HO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
HS
to V
HB
Average Output Current in HO and LO (Note 6) . . . . . . . . . . . . 0 to 150mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. All voltages are referenced toVSS unless otherwise specified.
6. The average output current, when driving a power MOSFET or similar capacitive load, is the average of the rectified output current. The peak output
currents of this driver are self limiting by trans conductance or r
DS(ON)
and do not required any external components to minimize the peaks. If the
output is driving a non-capacitive load, such as an LED, the maximum output current must be limited by external means to less than the specified
recommended rectified average output current.
7.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
8. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
9. The the maximum value of V
HS
must be limited so that V
HB
does not exceed 60V.
10. The -10V limit for V
HS
has no time duration restrictions as far as the HS pin is concerned however, be aware that if the duration of the negative voltage
is significant with respect to the time constant to charge the boot capacitor (across HB and HS) the voltage on the boot capacitor can charge as high
as V
DD
- (-V
HS
) = (V
DD
+V
HS
) potentially violating the Voltage Rating for (V
HB -
V
HS).
11. When V
BAT
< ~13V, the output of VDD will sag. The 5V minimum specified for V
BAT
is the minimum level for which the UVLO will not activate.
DC Electrical Specifications V
DD
= V
HB
= 12V (for HIP2103), V
SS
= V
HS
= 0V, V
BAT
= 18V (for HIP2104), LI = HI = 0V. No load on HO
and LO unless otherwise specified. Boldface limits apply over the operating junction temperature range, -40°C to +125°C.
PARAMETERS SYMBOL TEST CONDITIONS
T
J
= +25°C T
J
= -40°C to +125°C
UNITSMIN TYP MAX
MIN
(Note 12)
MAX
(Note 12)
LINEAR BIAS SUPPLIES (HIP2104 only)
V
DD
Output Voltage Over Rated
Line, Load, and Temperature
V
DD12
Nominal V
DD
= 12V -2.5 +2.1 +4.8 - 5% + 5% %
V
DD
Rated Output Current I
DDR
75 mA
V
DD
Output Current Limit
(brick wall)
I
DD12
83 151 237 80 245 mA
V
DD
Drop Output Voltage
(Figure 7)
VDdout Load = 75mA 0.06 0.7 V
HIP2103, HIP2104
6
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V
CC
Output Voltage Over Rated
Line, Load, and Temperature
V
CC3.3
Nominal V
CC
= 3.3V -3.9 +1.8 +4.3 - 5% + 5% %
V
CC
Rated Output Current I
CDR
75 mA
V
CC
Output Current Limit
(brick wall)
I
CC
83 149 237 80 245 mA
V
CC
Drop Output Voltage
(Figure 8)
VCdout Load = 75mA 0.5 0.9 V
BIAS CURRENTS
V
DD
Sleep Mode Current
(HIP2103)
I
DDS
HI = LI = 1, after 10 to 30µs delay 9.4 20 µA
V
BAT
Shutdown Current
(HIP2104)
I
DDSbatt
VCen = VDen = 0, after 10 to 30µs
delay, V
BAT
= 50V
4.8 15 µA
V
BAT
(HIP2104) or VDD
(HIP2103) Operating Current
I
DDO20
f = 20kHz, HI = LI = 50% square wave
V
DD
= 12V for HIP2103
832 1040 µA
I
DDO10
f = 10kHz, HI = LI = 50% square wave
V
DD
= 12V for HIP2103
661 825 µA
HB to HS Quiescent Current IHBQ HI = 1, LO = 0, V
HS
= 0V, V
HB
= 12V 135 160 µA
HB to HS Operating Current I
HBS20K
LI = 0, HI = 50% square wave
20kHz, V
HS
= 0V, V
HB
= 12V
206 245 µA
I
HBS10K
LI = 0, HI = 50% square wave
10kHz, V
HS
= 0V, V
HB
= 12V
167 193 µA
HB to V
SS
Operating Current I
HB20K
LI = 0, HI = 50% square wave
20kHz, V
HB
= 60V, V
HS
= 50V
201 240 µA
I
HB10K
LI = 0, HI = 50% square wave
10kHz, V
HB
= 60V, V
HS
= 50V
164 190 µA
HB to V
SS
Quiescent Current I
HBQ
LI = HI = 0V; V
HB
= 60V, V
HS
= 50V 120 145 µA
HS to V
SS
Current, Sleep Mode I
HBS
LI = HI = 1; HB open, V
HS
= 50V 0.03 +1 µA
INPUT PINS
Low Level Input Voltage
Threshold
V
IL
V
DD
= 12V
1.44 1.18 1.63 V
High Level Input Voltage
Threshold
V
IH
2.06 1.73 2.4 V
Input Voltage Hysteresis
V
Hys
0.62 0.48 0.85 V
Low Level Input Voltage
Threshold
V
IL
V
DD
= 5V
1.13 0.9 1.25 V
High Level Input Voltage
Threshold
V
IH
1.63 1.38 1.84 V
Input Voltage Hysteresis
V
Hys
0.50 0.36 0.63 V
Input Pull-Down
R
I
100 80 130 kΩ
UNDERVOLTAGE LOCKOUT (Note 13)
V
DD
Falling Threshold
V
UVF4
4V option 4.2 3.98 4.36 V
V
DD
Threshold Hysteresis
V
UVH
0.34 0.267 0.37 V
BOOT FET
DC Electrical Specifications V
DD
= V
HB
= 12V (for HIP2103), V
SS
= V
HS
= 0V, V
BAT
= 18V (for HIP2104), LI = HI = 0V. No load on HO
and LO unless otherwise specified. Boldface limits apply over the operating junction temperature range, -40°C to +125°C. (Continued)
PARAMETERS SYMBOL TEST CONDITIONS
T
J
= +25°C T
J
= -40°C to +125°C
UNITSMIN TYP MAX
MIN
(Note 12)
MAX
(Note 12)

HIP2104FRAANZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers 1/2 Bridge Driver with 4V UVLO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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