LTC3532
10
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be minimized. Note that if the load current applied during
forced Burst Mode operation (BURST pin is grounded)
exceeds the current that can be supplied, the output voltage
will start to droop and the IC will automatically come out
of Burst Mode operation and enter fi xed frequency mode,
raising V
OUT
. Once regulation is achieved, the IC will then
enter Burst Mode operation once again, and the cycle will
repeat, resulting in about 4% output ripple. Note that Burst
Mode operation is inhibited during soft-start.
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
not used and V
C
is disconnected from the error amplifi er.
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to fi xed frequency mode of operation, even
at the same load current. To prevent this, the LTC3532
incorporates an active clamp circuit that holds the voltage
on V
C
at an optimal voltage during Burst Mode operation.
This minimizes any output transient when returning to
xed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended
to broad band the control loop and roll off past the two
pole response of the output LC fi lter. (See Closing the
Feedback Loop.)
Soft-Start
The soft-start function is combined with shutdown. When
the SHDN/SS pin is brought above 1V typical, the IC is
enabled but the EA duty cycle is clamped from V
C
. A de-
tailed diagram of this function is shown in Figure 5. The
components R
SS
and C
SS
provide a slow ramping voltage
on SHDN/SS to provide a soft-start function. To ensure
that V
C
is not being clamped, SHDN/SS must be raised
above 2.4V. To enable Burst Mode operation, SHDN/SS
must be raised to within 0.5V of V
IN
.
+
9
10
V
IN
ERROR AMP
1.22V
15μA
FB
R1
R2
C
P1
V
C
V
OUT
8
SHDN/SS
C
SS
1V
ENABLE SIGNAL
R
SS
SOFT-START
CLAMP
TO PWM
COMPARATORS
CHIP
ENABLE
3532 F05
+
V
CI
Figure 5. Soft-Start Circuitry
OPERATIO
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LTC3532
11
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APPLICATIO S I FOR ATIO
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V
C
FB
SHDN/SS
V
IN
V
OUT
R
T
BURST
SW1
SW2
GND
GND
3532 F06
LTC3532
1
2
3
4
5
10
9
7
6
8
Figure 6. Recommended Component Placement. Traces Carrying
High Current are Direct. Trace area at FB and V
C
Pins are Kept
Low. Lead Length to Battery Should be Kept Short
Inductor Selection
The high frequency operation of the LTC3532 allows the
use of small surface mount inductors. The inductor ripple
current is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
L
BOOST
>
V
IN(MIN)
•(V
OUT
–V
IN(MIN)
)
f•ΔI
L
•V
OUT
H
L
BUCK
>
V
OUT
•(V
IN(MAX)
–V
OUT
)
f•ΔI
L
•V
IN(MAX)
H
where f = Operating frequency, Hz
ΔIL = Maximum allowable inductor ripple current, A
V
IN(MIN)
= Minimum input voltage
V
IN(MAX)
= Maximum input voltage
V
OUT
= Output voltage
I
OUT(MAX)
= Maximum output load current
For high effi ciency, choose a ferrite inductor with a high
frequency core material to reduce core losses. The induc-
tor should have low ESR (equivalent series resistance) to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. Molded chokes or chip
inductors usually do not have enough core to support the
peak inductor currents in the 1A to 2A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
Table 1. Inductor Vendor Information
SUPPLIER WEB SITE
Coilcraft www.coilcraft.com
Murata www.murata.com
Sumida www.sumida.com
TDK www.component.tdk.com
TOKO www.tokoam.com
Output Capacitor Selection
The bulk value of the output fi lter capacitor is set to reduce
the ripple due to charge into the capacitor each cycle. The
steady state ripple due to charge is given by:
% RIPPLE_BOOST =
I
OUT(MAX)
•(V
OUT
–V
IN(MIN)
)•100
C
OUT
•V
OUT
2
•f
%
% RIPPLE_BUCK =
1
8LCf
2
(V
IN(MAX)
–V
OUT
)100%
V
IN(MAX)
where C
OUT
= output fi lter capacitor in Farads and
f = switching frequency in Hz.
The output capacitance is usually many times larger than
the minimum value in order to handle the transient response
requirements of the converter. As a rule of thumb, the ratio
of the operating frequency to the unity-gain bandwidth of
the converter is the amount the output capacitance will
have to increase from the above calculations in order to
maintain the desired transient response.
The other component of ripple is due to the ESR (equiva-
lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden or
TDK ceramic capacitors, AVX TPS series tantalum capaci-
tors or Sanyo POSCAP are recommended. See Table 2 for
contact information.
LTC3532
12
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Table 2. Capacitor Vendor Information
SUPPLIER WEB SITE
AVX www.avxcorp.com
Murata www.murata.com
Sanyo www.sanyovideo.com
Taiyo Yuden www.t-yuden.com
TDK www.component.tdk.com
Input Capacitor Selection
Since V
IN
is the supply voltage for the IC, as well as the
input to the power stage of the converter, it is recommended
to place at least a 4.7μF, low ESR ceramic bypass capaci-
tor close to the V
IN
and GND pins. It is also important to
minimize any stray resistance from the converter to the
battery or other power source.
Optional Schottky Diodes
The Schottky diodes across the synchronous switches
B and D are not required (V
OUT
< 4.3V), but provide a
lower drop during the break-before-make time (typically
15ns) improving effi ciency. Use a surface mount Schottky
diode such as an MBRM120T3 or equivalent. Do not use
ordinary rectifi er diodes, since the slow recovery times
will compromise effi ciency. For applications with an
output voltage above 4.3V, a Schottky diode is required
from SW2 to V
OUT
.
Output Voltage > 4.3V
A Schottky diode from SW2 to V
OUT
is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between SW1 and
GND. A Schottky diode from SW1 to V
IN
should also be
added as close to the pins as possible. For the higher input
voltages, V
IN
bypassing becomes more critical; therefore,
a ceramic bypass capacitor as close to the V
IN
and SGND
pins as possible is also required.
Operating Frequency Selection
Higher operating frequencies allow the use of a smaller
inductor and smaller input and output fi lter capacitors,
thus reducing board area and component height. How-
ever, higher operating frequencies also increase the IC’s
total quiescent current due to the gate charge of the four
switches, as given by:
Buck: I
Q
= (0.125 • V
IN
• f) mA
Boost: I
Q
= [0.06 • (V
IN
+ V
OUT
) • f] mA
Buck/Boost: I
Q
= [f • (0.19 • V
IN
+ 0.06 • V
OUT
)] mA
where f = switching frequency in MHz. Therefore frequency
selection is a compromise between the optimal effi ciency
and the smallest solution size.
Closing the Feedback Loop
The LTC3532 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck/boost), but is usually no greater than
15. The output fi lter exhibits a double pole response, as
given by:
f
FILTER
POLE
=
1
2•π •LC
OUT
Hz
(in buck mode)
f
FILTER
POLE
=
V
IN
2•V
OUT
π •LC
OUT
Hz
(in boost mode)
where L is in henrys and C
OUT
is in farads.
The output fi lter zero is given by:
f
FILTER
ZERO
=
1
2•π •R
ESR
•C
OUT
Hz
where R
ESR
is the equivalent series resistance of the
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
f
RHPZ
=
V
IN
2
2•π •I
OUT
•LV
OUT
Hz
APPLICATIO S I FOR ATIO
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LTC3532EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Micropower Synchronous Buck-Boost DC/DC Converter
Lifecycle:
New from this manufacturer.
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