LTC3532
7
3532fc
OPERATIO
U
The LTC3532 provides high effi ciency, low noise power
for applications such as portable instrumentation, digital
cameras, and MP3 players. The LTC proprietary topology
allows input voltages above, below or equal to the output
voltage by properly phasing the output switches. The error
amp output voltage on V
C
determines the output duty cycle
of the switches. Since V
C
is a fi ltered signal, it provides
rejection of frequencies well below the switching frequency.
The low R
DS(ON)
, low gate charge synchronous switches
provide high frequency pulse width modulation control at
high effi ciency. Schottky diodes across the synchronous
switch D and synchronous switch B are not required, but
provide a lower voltage drop during the break-before-make
time (typically 15ns). Schottky diodes will improve peak
effi ciency by typically 1% to 2%. High effi ciency is achieved
at light loads when Burst Mode operation is entered and
the IC’s quiescent current drops to a low 35μA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is programmed by an external
resistor from R
T
to ground, according to the following
equation:
f(kHz) =
48,000
R
T
(kΩ)
Error Amp
The error amplifi er is a voltage mode amplifi er. The loop
compensation components are confi gured around the
amplifi er (from FB to V
C
) to obtain stability of the converter.
For improved bandwidth, an additional RC feedforward
network can be placed across the upper feedback divider
resistor. The voltage on SHDN/SS clamps the error amp
output, V
C
, to provide a soft-start function.
Internal Current Limit
There are two different current limit circuits in the LTC3532.
They have internally fi xed thresholds which vary inversely
with V
IN
. The fi rst circuit is a high speed peak current limit
comparator that will shut off switch A if the current exceeds
1.1A typical. The delay to output of this amplifi er is typi-
cally 50ns. A second amplifi er will begin to source current
into the FB pin to drop the output voltage once the peak
input current exceeds 1A typical. This method provides a
closed loop means of clamping the input current. During
conditions where V
OUT
is near ground, such as during a
short-circuit or during startup, this threshold is cut in half
providing a fold back feature. For this current limit feature
to be most effective, the Thevenin resistance from FB to
ground should be greater than 100k.
Reverse Current Limit
During fi xed frequency operation, the LTC3532 operates in
forced continuous conduction mode. The reverse current
limit amplifi er monitors the inductor current from the out-
put through switch D. Once the negative inductor current
exceeds 340mA typical, the IC will shut off switch D.
4-Switch Control
Figure 1 shows a simplifi ed diagram of how the four internal
switches are connected to the inductor, V
IN
, V
OUT
and GND.
Figure 2 shows the regions of operation for the LTC3532 as
a function of the internal control voltage, V
CI
. Depending
on the control voltage, the IC will operate in either buck,
buck/boost or boost mode. The V
CI
voltage is a level shifted
voltage from the output of the error amp (V
C
) (see Figure
5). The four power switches are properly phased so the
transfer between operating modes is continuous, smooth
and transparent to the user. When V
IN
approaches V
OUT
the buck/boost region is reached where the conduction
time of the 4-switch region is typically 150ns. Referring
to Figures 1 and 2, the various regions of operation will
now be described.
3
SW1
4
SW2
PMOS A
NMOS B
7
V
IN
PMOS D
NMOS C
3532 F01
6
V
OUT
Figure 1. Simplifi ed Diagram of Output Switches
