LTC3532
13
3532fc
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorpo-
rated to stabilize the loop, but at a cost of reduced band-
width and slower transient response. To ensure proper
phase margin using Type I compensation, the loop must
be crossed over a decade before the LC double pole.
The unity-gain frequency of the error amplifi er with the
Type I compensation is given by:
f
UG
=
1
2•π •R1C
P1
Hz
referring to Figure 7.
Most applications demand an improved transient response
to allow a smaller output fi lter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output fi lter. Referring to Figure 8, the location of the
poles and zeros are given by:
f
POLE1
1
2•π •32e
3
•R1CP1
Hz
(which is extremely close to DC)
f
ZERO1
=
1
2•π •R
Z
•C
P1
Hz
f
ZERO2
=
1
2•π •R1C
Z1
Hz
f
POLE2
=
1
2•π •R
Z
•C
P2
Hz
where resistance is in ohms and capacitance is in far-
ads.
1.22V
R1
R2
3532 F07
FB
9
V
C
C
P1
V
OUT
10
+
ERROR
AMP
1.22V
R1
R2
3532 F08
FB
9
V
C
C
P1
C
Z1
R
Z
V
OUT
10
C
P2
+
ERROR
AMP
Figure 7. Error Amplifi er with Type l Compensation Figure 8. Error Amplifi er with Type lll Compensation
APPLICATIO S I FOR ATIO
WUU
U
LTC3532
14
3532fc
SW1
SW1
V
IN
SHDN/SS
BURST
R
T
SW2
SW2
V
OUT
FB
FB
VC
VC
GND
LTC3532
3532 TA02
SHDN
R4
86.6k
200k
C5
4.7nF
R7
200k
C1
4.7μF
R
T
BURST
0.01μF
L1
4.7μH
V
OUT
3.3V
300mA
C3
22μF
C4
150pF
R9
1k
R1
340k
R6
12.1k
C2
150pF
R2
200k
V
IN
2.7V TO 4.5V
SW1
SW1
V
IN
SHDN/SS
BURST
R
T
SW2
SW2
V
OUT
FB
FB
V
C
V
C
GND
LTC3532
3532 TA03
SHDN
R4
28.7k
C5
4.7nF
R7
200k
C1
4.7μF
R
T
BURST
L1
2.2μH
V
OUT
5V
300mA
C3
10μF
C4
68pF
R9
1k
R1
412k
R6
12.1k
C2
220pF
R2
133k
D1
DMBRM 110LT3
SD
V
IN
2.5V TO 4.2V
Three Cell to 3.3V at 300mA Buck-Boost Converter
With Automatic Burst Mode Operation and Soft-Start
Li-Ion to 5V Boost Converter with Output Disconnect
TYPICAL APPLICATIO S
U
LTC3532
15
3532fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN 1103
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.675 ±0.05
3.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
MSOP (MS) 0307 REV E
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
12
3
45
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910
7
6
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010)
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)

LTC3532EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Micropower Synchronous Buck-Boost DC/DC Converter
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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