Operation
M41T00CAP
Figure 7: READ mode sequence
Figure 8: Alternative READ mode sequence
AI00899
BUS
ACTIVITY
:
ACK
S
ACK
ACK
ACK
NOACK
STO
P
START
P
SD
A
LINE
BUS
ACTIVITY
:
MASTER
R/W
DATA n D
ATA
n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
S
S
TA
RT
R/W
SL
A
VE
ADDRESS
ACK
AI00895
BUS ACTIVITY:
ACK
S
ACK
ACK
ACK
NO ACK
STOP
START
PSDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n DATA n+1 DATA n+X
SLAVE
ADDRESS
10/24 DocID014557 Rev 6
M41T00CAP
Operation
2.9 WRITE mode
In this mode the master transmitter transmits to the M41T00CAP slave receiver. Bus
protocol is shown in Figure 9: "WRITE mode sequence". Following the START condition
and slave address, a logic '0' (R/W=0) is placed on the bus and indicates to the addressed
device that word address “An” will follow and is to be written to the on-chip address pointer.
The data word to be written to the memory is strobed in next and the internal address
pointer is incremented to the next address location on the reception of an acknowledge
clock. The device slave receiver will send an acknowledge clock to the master transmitter
after it has received the slave address and again after it has received the word address and
after each data byte.
Figure 9: WRITE mode sequence
2.10 Data retention mode
With valid V
CC
applied, the M41T00CAP can be accessed as described above with READ
or WRITE cycles. Should the supply voltage decay, the power input will be switched from
the V
CC
pin to the battery when V
CC
falls below the battery backup switchover voltage (V
SO
).
At this time the clock registers will be maintained by the internal battery supply. On power-
up, when V
CC
returns to a nominal value, write protection continues for t
REC
after V
CC
rises
above V
SO
.
AI00591
BUS ACTIVITY:
ACK
S
ACK
ACK
ACK
ACK
STOP
START
PSDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n DATA n+1 DATA n+X
WORD
ADDRESS(An)
SLAVE
ADDRESS
DocID014557 Rev 6 11/24
Clock operation
M41T00CAP
3 Clock operation
The 8-byte register map (see Table 2: "TIMEKEEPER® register map") is used to both set
the clock and to read the date and time from the clock, in a binary coded decimal format.
Seconds, minutes, and hours are contained within the first three registers. Bits D6 and D7
of clock register 02h (century/hours register) contain the century enable bit (CEB) and the
century bit (CB). Setting CEB to a '1' will cause CB to toggle, either from '0' to '1' or from '1'
to '0' at the turn of the century (depending upon its initial state). If CEB is set to a '0,' CB will
not toggle. Bits D0 through D2 of Register 03h contain the Day (day of week). Registers
04h, 05h, and 06h contain the date (day of month), month and years. The eighth clock
register is the calibration register (this is described in the clock calibration section). Bit D7
of register 00h contains the STOP bit (ST). Setting this bit to a '1' will cause the oscillator to
stop. If the device is expected to spend a significant amount of time on the shelf, the
oscillator may be stopped to reduce current drain. When reset to a '0' the oscillator restarts
within one second. The seven clock registers may be read one byte at a time, or in a
sequential block. The calibration register (address location 07h) may be accessed
independently. Provision has been made to ensure that a clock update does not occur
while any of the seven clock addresses are being read. If a clock address is being read, an
update of the clock registers will be halted. This will prevent a transition of data during the
READ.
Table 2: TIMEKEEPER
®
register map
Addr
Function/range BCD format
D7 D6 D5 D4 D3 D2 D1 D0
00h ST 10 seconds Seconds Seconds 00-59
01h OF 10 minutes Minutes Minutes 00-59
02h CEB CB 10 hours Hours (24-hour format) Century/hours 0-1/00-23
03h 0 0 0 0 0 Day of week Day 01-7
04h 0 0 10 date Date: day of month Date 01-31
05h 0 0 0 10M Month Month 01-12
06h 10 years Year Year 00-99
07h OUT FT S Calibration Calibration
Keys:
0 = must be set to '0'
CB = century bit
CEB = century enable bit
FT = frequency test bit
OF = oscillator fail bit
OUT = output level
S = sign bit
ST = stop bit
12/24 DocID014557 Rev 6

M41T00CAPPC1

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock Serial real-time clock (RTC) with integral backup battery and crystal
Lifecycle:
New from this manufacturer.
Delivery:
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