EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
XRD98L61
CCD Image Digitizers with
CDS, PGA and 12-Bit A/D
May 2001-2
FEATURES
• 12-Bit Resolution ADC
• 20MHz Sampling Rate
• 10-Bit Programmable Gain: 0dB to 36dB PGA
• Digitally Controlled Offset-Calibration with Pixel
Averager and Hot Pixel Clipper
• Widest Black Level Calibration Range at
Maximum Gain
• DNS Filter Removes Black Level Digital Noise
• Manual Control of Offset DAC via Serial Port for
use with High-speed Scanners
• 1ns/step Programmable Aperture Delay on SPIX,
SBLK and ADCLK Sampling Clocks
• Single 2.7V to 3.6V Power Supply
• Optimized Power Consumption down to 125mW
with External Resistor
• Low Power for Battery Operation
• Two Serially Controlled 8-Bit D/A Converters
APPLICATIONS
• Mega-pixel Digital Still Cameras
• Digital Camcorders
• 3-CCD Professional/Broadcast Camera
• Line Scan Cameras
• PC Video Cameras
• CCTV/Security Cameras
• Industrial/Medical Cameras
• 2D Bar Code Readers
• High Speed Scanners
• Digital Copiers
GENERAL DESCRIPTION
The XRD98L61 is a complete, low power CCD Image
Digitizer for digital motion and still cameras. The
product includes a high bandwidth differential Corre-
lated Double Sampler (CDS), 10-bit digitally Program-
mable Gain Amplifier (PGA), 12-bit Analog-to-Digital
Converter (ADC) and improved digitally controlled
black level auto-calibration circuitry with program-
mable pixel averager, hot pixel clipper, and a DNS
filter.
Two 8-bit serial controlled digital-to-analog converter
(DACs) are provided to control external analog signals
(Iris, Focus, Flash, etc.)
The Correlated Double Sampler (CDS) subtracts the
CCD output signal black level from the video level.
Common mode signal and power supply noise are
rejected by the differential CDS input stage.
The PGA is digitally controlled with 10-bit resolution on
a linear dB scale, resulting in a gain range of 0dB to
36dB with 0.047dB per LSB of the gain code.
The auto calibration circuit compensates for any inter-
nal offset of the XRD98L61 as well as black level offset
from the CCD.
The PGA and black level auto-calibration are con-
trolled through a simple 3-wire serial interface. The
timing circuitry is designed to enable users to select a
wide variety of available CCD and image sensors for
their applications. Readback of the serial data regis-
ters is available from the digital output bus.
The XRD98L61 has direct access to the ADC and
PGA inputs for digitizing other analog signals.
The XRD98L61 is packaged in 48-lead TQFP to reduce
space and weight, and is suitable for hand-held and
portable applications.
Rev. 2.00
• 0.1mA Stand-by Mode Current
• Three-state Digital Outputs
• 2,000V ESD Protection
• 48-Pin TQFP Package
ORDERING INFORMATION
Operating Maximum
Part No. Package Temperature Range Power Supply Sampling Rate
XRD98L61AIV 48-Pin TQFP -40°C to 85°C 3.0V 20 MSPS
