LT1711IMS8#TRPBF

4
LT1711/LT1712
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1711C/LT1712C are guaranteed to meet specified
performance from 0°C to 70°C. They are designed, characterized and
expected to meet specified performance from –40°C to 85°C but are not
tested or QA sampled at these temperatures. The LT1711I/LT1712I are
guaranteed to meet specified performance from –40°C to 85°C.
Note 3: The negative supply should not be greater than the ground pin
voltage and the maximum voltage across the positive and negative
supplies should not be greater than 12V.
Note 4: Input offset voltage (V
OS
) is measured with the LT1711/LT1712 in
a configuration that adds external hysteresis. It is defined as the average of
the two hysteresis trip points.
Note 5: Input bias current (I
B
) is defined as the average of the two input
currents.
Note 6: Propagation delay (t
PD
) is measured with the overdrive added to
the actual V
OS
. Differential propagation delay is defined as:
t
PD
= t
PD
+
– t
PD
. Load capacitance is 10pF. Due to test system
requirements, the LT1711/LT1712 propagation delay is specified with a
1k load to ground for ±5V supplies, or to mid-supply for 2.7V or 5V
single supplies.
Note 7: Latch propagation delay (t
LPD
) is the delay time for the output to
respond when the latch pin is deasserted. Latch setup time (t
SU
) is the
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
A
V
Small-Signal Voltage Gain 1 15 V/mV
V
OH
Output Voltage Swing HIGH (Note 8) I
OUT
= 1mA, V
OVERDRIVE
= 50mV 4.5 4.8 V
I
OUT
= 10mA, V
OVERDRIVE
= 50mV 4.3 4.6 V
V
OL
Output Voltage Swing LOW (Note 8) I
OUT
= –1mA, V
OVERDRIVE
= 50mV 0.20 0.4 V
I
OUT
= –10mA, V
OVERDRIVE
= 50mV 0.30 0.5 V
I
+
Positive Supply Current (Per Comparator) V
OVERDRIVE
= 1V 17 22 mA
30 mA
I
Negative Supply Current (Per Comparator) V
OVERDRIVE
= 1V 9 12 mA
15 mA
V
IH
Latch Pin High Input Voltage 2.4 V
V
IL
Latch Pin Low Input Voltage 0.8 V
I
IL
Latch Pin Current V
LATCH
= V
+
15 µA
t
PD
Propagation Delay (Notes 6, 11) V
IN
= 100mV, V
OVERDRIVE
= 20mV 4.5 6.0 ns
V
IN
= 100mV, V
OVERDRIVE
= 20mV 8.5 ns
V
IN
= 100mV, V
OVERDRIVE
= 5mV 5.5 ns
t
PD
Differential Propagation Delay (Notes 6, 11) V
IN
= 100mV, V
OVERDRIVE
= 20mV 0.5 1.5 ns
t
r
Output Rise Time 10% to 90% 2 ns
t
f
Output Fall Time 90% to 10% 2 ns
t
LPD
Latch Propagation Delay (Note 7) 5ns
t
SU
Latch Setup Time (Note 7) 1ns
t
H
Latch Hold Time (Note 7) 0ns
t
DPW
Minimum Latch Disable Pulse Width (Note 7) 5 ns
f
MAX
Maximum Toggle Frequency V
IN
= 100mV
P-P
Sine Wave 100 MHz
t
JITTER
Output Timing Jitter V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz 11 ps
RMS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
= –5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (t
H
) is the interval after the latch is asserted in
which the input signal must remain stable. Latch disable pulse width
(t
DPW
) is the width of the negative pulse on the latch enable pin that
latches in new data on the data inputs.
Note 8: Output voltage swings are characterized and tested at V
+
= 5V and
V
= 0V. They are guaranteed by design and correlation to meet these
specifications at V
= –5V.
Note 9: The input voltage range is tested under the more demanding
conditions of V
+
= 5V and V
= –5V. The LT1711/LT1712 are guaranteed
by design and correlation to meet these specifications at V
= 0V.
Note 10: The LT1711/LT1712 voltage gain is tested at V
+
= 5V and
V
= –5V only. Voltage gain at single supply V
+
= 5V and V
+
= 2.7V is
guaranteed by design and correlation.
Note 11: The LT1711/LT1712 t
PD
is tested at V
+
= 5V and 2.7V with
V
= 0V. Propagation delay at V
+
= 5V, V
= –5V is guaranteed by design
and correlation.
Note 12: Care must be taken to make sure that the LT1711/LT1712 do not
exceed T
JMAX
when operating with ±5V supplies over the industrial
temperature range. T
JMAX
is not exceeded for DC inputs, but supply
current increases with switching frequency (see Typical Performance
Characteristics).
5
LT1711/LT1712
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Propagation Delay
vs Load Capacitance
Propagation Delay
vs Input Common Mode Voltage
Propagation Delay
vs Positive Supply Voltage
Positive Supply Current
vs Positive Supply Voltage
Negative Supply Current
vs Negative Supply Voltage
Positive Supply Current
vs Switching Frequency
Input Bias Current
vs Input Common Mode Voltage
Input Offset Voltage vs
Temperature
Propagation Delay vs
Temperature
TEMPERATURE (°C)
–50
INPUT OFFSET VOLTAGE (mV)
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
0
50
75
171112 G01
–25
25
100
125
V
CM
= 2.5V
V
CM
= 5V
V
CM
= 0V
V
+
= 5V
V
= 0V
LOAD CAPACITANCE (pF)
0 60 100
171112 G02
20
10
9
8
7
t
PD
+
6
5
4
3
40
80 120
PROPAGATION DELAY (ns)
t
PD
T
A
= 25°C
V
+
= 5V
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
TEMPERATURE (°C)
–50
PROPAGATION DELAY (ns)
100
171112 G03
050
8
7
6
5
4
3
2
1
0
25 25 75 125
t
PD
+
t
PD
V
+
= 5V
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
INPUT COMMON MODE (V)
–1
PROPAGATION DELAY (ns)
5.5
2
171112 G04
4.5
01 3
3.5
3.0
6.0
5.0
4.0
456
t
PD
t
PD
+
T
A
= 25°C
V
+
= 5V
V
= 0V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
2
4
6810
POSITIVE SUPPLY VOLTAGE (V)
0
PROPAGATION DELAY (ns)
5.5
171112 G05
4.0
3.0
6.0
5.0
4.5
3.5
t
PD
t
PD
+
T
A
= 25°C
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
POSITIVE SUPPLY VOLTAGE (V)
0
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
25
20
15
10
5
0
2
468
171112 G06
10 12
V
= –5V
V
IN
= 100mV
I
OUT
= 0mA
I
+
AT –55°C
I
+
AT 25°C
I
+
AT 85°C
V
= 0V
SWITCHING FREQUENCY (MHz)
0
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
40
30
20
10
0
10 20 30 40
171112 G07
50 60
T
A
= 25°C
V
+
= 5V
V
= 0V
C
LOAD
= 10pF
NEGATIVE SUPPLY VOLTAGE (V)
0
14
12
10
8
6
4
2
0
–3 –5
171112 G08
–1 –2
–4 –6 –7
NEGATIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
I
AT –55°C
I
AT 25°C
I
AT 85°C
V
+
= 5V
V
IN
= 100mV
I
OUT
= 0mA
INPUT COMMON MODE VOLTAGE (V)
–1
INPUT BIAS CURRENT (µA)
–2
4
10
246
171112 G09
–8
–14
–20
01
3
5
V
+
= 5V
V
= 0V
V
IN
= 0mV
I
B
AT –55°C
I
B
AT 25°C
I
B
AT 125°C
6
LT1711/LT1712
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output High Voltage
vs Source Current
Output Timing Jitter
vs Switching Frequency
Output Rising Edge, 5V Supply Output Falling Edge, 5V Supply
V
IN
Q
V
IN
Q
Output Low Voltage
vs Sink Current
Input Bias Current vs
Temperature
UU
U
PI FU CTIO S
V
+
(Pins 1): Positive Supply Voltage, Usually 5V.
+IN (Pin 2): Noninverting Input.
IN (Pin 3): Inverting Input.
V
(Pins 4): Negative Supply Voltage, Usually 0V or –5V.
LATCH ENABLE (Pin 5):
Latch Enable Input. With a logic
high, the output is latched.
TEMPERATURE (°C)
–50
INPUT BIAS CURRENT (µA)
100
171112 G10
050
0
–1
–2
–3
–4
–5
–6
–7
–8
25 25 75 125
V
+
= 5V
V
= 0V
V
CM
= 2.5V
SOURCE CURRENT (mA)
0.1
OUTPUT VOLTAGE (V)
5.0
4.9
4.8
4.7
4.6
4.5
4.4
4.3
4.2
4.1
4.0
1.0 10 100
171112 G11
V
+
= 5V
V
= 0V
V
IN
= 100mV
V
OH
AT –55°C
V
OH
AT 25°C
V
OH
AT 125°C
SINK CURRENT (mA)
0.1
OUTPUT VOLTAGE (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0 10 100
171112 G12
V
OL
AT –55°C
V
OL
AT 25°C
V
OL
AT 125°C
V
+
= 5V
V
= 0V
V
IN
= 100mV
FREQUENCY (MHz)
0
OUTPUT TIMING JITTER (ps
RMS
)
100
90
80
70
60
50
40
30
30
10
0
80
171112 G13
20
40
60
100
T
A
= 25°C
V
+
= 5V
V
= 0V
V
CM
= 2.5V
V
IN
= 630mV
P-P
(0dBm) SINE WAVE
GND (Pin 6): Ground Supply Voltage, Usually 0V.
Q (Pin 7): Noninverting Output.
Q (Pin 8): Inverting Output.
LT1711
171112 G14
171112 G15

LT1711IMS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Comparators 4.5ns R2R Comp
Lifecycle:
New from this manufacturer.
Delivery:
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