4
LT1711/LT1712
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1711C/LT1712C are guaranteed to meet specified
performance from 0°C to 70°C. They are designed, characterized and
expected to meet specified performance from –40°C to 85°C but are not
tested or QA sampled at these temperatures. The LT1711I/LT1712I are
guaranteed to meet specified performance from –40°C to 85°C.
Note 3: The negative supply should not be greater than the ground pin
voltage and the maximum voltage across the positive and negative
supplies should not be greater than 12V.
Note 4: Input offset voltage (V
OS
) is measured with the LT1711/LT1712 in
a configuration that adds external hysteresis. It is defined as the average of
the two hysteresis trip points.
Note 5: Input bias current (I
B
) is defined as the average of the two input
currents.
Note 6: Propagation delay (t
PD
) is measured with the overdrive added to
the actual V
OS
. Differential propagation delay is defined as:
∆t
PD
= t
PD
+
– t
PD
–
. Load capacitance is 10pF. Due to test system
requirements, the LT1711/LT1712 propagation delay is specified with a
1kΩ load to ground for ±5V supplies, or to mid-supply for 2.7V or 5V
single supplies.
Note 7: Latch propagation delay (t
LPD
) is the delay time for the output to
respond when the latch pin is deasserted. Latch setup time (t
SU
) is the
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
A
V
Small-Signal Voltage Gain 1 15 V/mV
V
OH
Output Voltage Swing HIGH (Note 8) I
OUT
= 1mA, V
OVERDRIVE
= 50mV ● 4.5 4.8 V
I
OUT
= 10mA, V
OVERDRIVE
= 50mV ● 4.3 4.6 V
V
OL
Output Voltage Swing LOW (Note 8) I
OUT
= –1mA, V
OVERDRIVE
= 50mV ● 0.20 0.4 V
I
OUT
= –10mA, V
OVERDRIVE
= 50mV ● 0.30 0.5 V
I
+
Positive Supply Current (Per Comparator) V
OVERDRIVE
= 1V 17 22 mA
● 30 mA
I
–
Negative Supply Current (Per Comparator) V
OVERDRIVE
= 1V 9 12 mA
● 15 mA
V
IH
Latch Pin High Input Voltage ● 2.4 V
V
IL
Latch Pin Low Input Voltage ● 0.8 V
I
IL
Latch Pin Current V
LATCH
= V
+
● 15 µA
t
PD
Propagation Delay (Notes 6, 11) ∆V
IN
= 100mV, V
OVERDRIVE
= 20mV 4.5 6.0 ns
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV ● 8.5 ns
∆V
IN
= 100mV, V
OVERDRIVE
= 5mV 5.5 ns
∆t
PD
Differential Propagation Delay (Notes 6, 11) ∆V
IN
= 100mV, V
OVERDRIVE
= 20mV 0.5 1.5 ns
t
r
Output Rise Time 10% to 90% 2 ns
t
f
Output Fall Time 90% to 10% 2 ns
t
LPD
Latch Propagation Delay (Note 7) 5ns
t
SU
Latch Setup Time (Note 7) 1ns
t
H
Latch Hold Time (Note 7) 0ns
t
DPW
Minimum Latch Disable Pulse Width (Note 7) 5 ns
f
MAX
Maximum Toggle Frequency V
IN
= 100mV
P-P
Sine Wave 100 MHz
t
JITTER
Output Timing Jitter V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz 11 ps
RMS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
–
= –5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (t
H
) is the interval after the latch is asserted in
which the input signal must remain stable. Latch disable pulse width
(t
DPW
) is the width of the negative pulse on the latch enable pin that
latches in new data on the data inputs.
Note 8: Output voltage swings are characterized and tested at V
+
= 5V and
V
–
= 0V. They are guaranteed by design and correlation to meet these
specifications at V
–
= –5V.
Note 9: The input voltage range is tested under the more demanding
conditions of V
+
= 5V and V
–
= –5V. The LT1711/LT1712 are guaranteed
by design and correlation to meet these specifications at V
–
= 0V.
Note 10: The LT1711/LT1712 voltage gain is tested at V
+
= 5V and
V
–
= –5V only. Voltage gain at single supply V
+
= 5V and V
+
= 2.7V is
guaranteed by design and correlation.
Note 11: The LT1711/LT1712 t
PD
is tested at V
+
= 5V and 2.7V with
V
–
= 0V. Propagation delay at V
+
= 5V, V
–
= –5V is guaranteed by design
and correlation.
Note 12: Care must be taken to make sure that the LT1711/LT1712 do not
exceed T
JMAX
when operating with ±5V supplies over the industrial
temperature range. T
JMAX
is not exceeded for DC inputs, but supply
current increases with switching frequency (see Typical Performance
Characteristics).