HEF4027B_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 26 June 2013 5 of 13
NXP Semiconductors HEF4027B-Q100
Dual JK flip-flop
10. Static characteristics
Table 6. Static characteristics
V
SS
= 0 V; V
I
= V
SS
or V
DD
; unless otherwise specified.
Symbol Parameter Conditions V
DD
T
amb
= 40 C T
amb
= 25 C T
amb
= 85 C Unit
Min Max Min Max Min Max
V
IH
HIGH-level input voltage I
O
< 1 A 5 V 3.5 - 3.5 - 3.5 - V
10 V 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - V
V
IL
LOW-level input voltage I
O
< 1 A5 V-1.5-1.5-1.5V
10 V - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 V
V
OH
HIGH-level output voltage I
O
< 1 A 5 V 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - V
V
OL
LOW-level output voltage I
O
< 1 A 5 V - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 V
I
OH
HIGH-level output current V
O
= 2.5 V 5 V - 1.7 - 1.4 - 1.1 mA
V
O
= 4.6 V 5 V - 0.52 - 0.44 - 0.36 mA
V
O
= 9.5 V 10 V - 1.3 - 1.1 - 0.9 mA
V
O
= 13.5 V 15 V - 3.6 - 3.0 - 2.4 mA
I
OL
LOW-level output current V
O
= 0.4 V 5 V 0.52 - 0.44 - 0.36 - mA
V
O
= 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA
V
O
= 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA
I
I
input leakage current 15 V - 0.3 - 0.3 - 1.0 A
I
DD
supply current I
O
= 0 A 5 V - 4.0 - 4.0 - 30 A
10 V - 8.0 - 8.0 - 60 A
15 V - 16.0 - 16.0 - 120 A
C
I
input capacitance - - - - 7.5 - - pF
