1.8V TO 3.3V LVCMOS HIGH PERFORMANCE CLOCK BUFFER FAMILY 6 MARCH 28, 2017
5PB11xx DATASHEET
AC Electrical Characteristics
(VDD = 1.8V, 2.5V, 3.3V)
VDD = 1.8V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise.
VDD = 2.5V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise.
VDD = 3.3V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise.
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency 0 200 MHz
Output Rise Time (2pF load) t
OR
0.36V to 1.44V, C
L
= 2 pF 0.5 0.75 ns
Output Fall Time (2pF load) t
OF
1.44V to 0.36V, C
L
= 2 pF 0.5 0.75 ns
Output Rise Time (5pF load) t
OR
0.36V to 1.44V, C
L
= 5 pF 0.8 1.0 ns
Output Fall Time (5pF load) t
OF
1.44V to 0.36V, C
L
= 5 pF 0.8 1.0 ns
Start-up Time t
START-UP
Part start-up time for valid outputs after VDD ramp-up 3 ms
Propagation Delay Note 1 1.5 1.9 2.5 ns
Buffer Additive Phase Jitter, RMS 156.25MHz, Integration Range: 12kHz-20MHz 0.05 ps
Output to Output Skew (5PB1102/04) Rising edges at VDD/2, Note 2 35 50 ps
Output to Output Skew (5PB1106) Rising edges at VDD/2, Note 2 35 58 ps
Output to Output Skew (5PB1108/10) Rising edges at VDD/2, Note 2 45 65 ps
Device to Device Skew Rising edges at VDD/2 200 ps
Output Enable Time t
EN
C
L
< 5pF 3 cycles
Output Disable Time t
DIS
C
L
< 5pF 3 cycles
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency 0 200 MHz
Output Rise Time (2pF load) t
OR
0.5V to 2.0V, C
L
= 2 pF 0.4 0.7 ns
Output Fall Time (2pF load) t
OF
2.0V to 0.5V, C
L
= 2 pF 0.4 0.7 ns
Output Rise Time (5pF load) t
OR
0.5V to 2.0V, C
L
= 5 pF 0.75 1.0 ns
Output Fall Time (5pF load) t
OF
2.0V to 0.5V, C
L
= 5 pF 0.75 1.0 ns
Start-up Time t
START-UP
Part start-up time for valid outputs after VDD ramp-up 3 ms
Propagation Delay (5PB1102/04)
Note 1
1.9 2.4 2.9 ns
Propagation Delay (5PB1106/08) 2.0 2.4 3.3 ns
Propagation Delay (5PB1110) 2.0 2.4 3.0 ns
Buffer Additive Phase Jitter, RMS 156.25MHz, Integration Range: 12kHz-20MHz 0.05 ps
Output to Output Skew (5PB1102/04) Rising edges at VDD/2, Note 2 35 50 ps
Output to Output Skew (5PB1106) Rising edges at VDD/2, Note 2 35 58 ps
Output to Output Skew (5PB1108/10) Rising edges at VDD/2, Note 2 45 65 ps
Device to Device Skew Rising edges at VDD/2 200 ps
Output Enable Time t
EN
C
L
< 5pF 3 cycles
Output Disable Time t
DIS
C
L
< 5pF 3 cycles
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency 0 200 MHz
Output Rise Time (2pF load) t
OR
0.66V to 2.64V, C
L
= 2pF 0.45 0.6 ns
Output Fall Time (2pF load) t
OF
2.64V to 0.66V, C
L
= 2pF 0.45 0.6 ns
Output Rise Time (5pF load) t
OR
0.66V to 2.64V, C
L
= 5pF 0.7 1.0 ns
Output Fall Time (5pF load) t
OF
2.64V to 0.66V, C
L
= 5pF 0.7 1.0 ns