December 1990 6
Philips Semiconductors Product specification
Quad D-type flip-flop; positive-edge trigger; 3-state 74HC/HCT173
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
=t
f
= 6 ns; C
L
=50pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
CP to Q
n
55
20
16
175
35
30
220
44
37
265
53
45
ns 2.0
4.5
6.0
Fig.6
t
PHL
propagation delay
MR to Q
n
44
16
13
150
30
26
190
38
33
225
45
38
ns 2.0
4.5
6.0
Fig.7
t
PZH
/ t
PZL
3-state output enable time
OE
n
to Q
n
52
19
15
150
30
26
190
38
33
225
45
38
ns 2.0
4.5
6.0
Fig.8
t
PHZ
/ t
PLZ
3-state output disable time
OE
n
to Q
n
52
19
15
150
30
26
190
38
33
225
45
38
ns 2.0
4.5
6.0
Fig.8
t
THL
/ t
TLH
output transition time 14
5
4
60
12
10
75
15
13
90
18
15
ns 2.0
4.5
6.0
Fig.6
t
W
clock pulse width
HIGH or LOW
80
16
14
14
5
4
100
20
17
120
24
20
ns 2.0
4.5
6.0
Fig.6
t
W
master reset pulse
width; HIGH
80
16
14
14
5
4
100
20
17
120
24
20
ns 2.0
4.5
6.0
Fig.7
t
rem
removal time
MR to CP
60
12
10
−8
−3
−2
75
15
13
90
18
15
ns 2.0
4.5
6.0
Fig.7
t
su
set-up time
E
n
to CP
100
20
17
33
12
10
125
25
21
150
30
26
ns 2.0
4.5
6.0
Fig.9
t
su
set-up time
D
n
to CP
60
12
10
17
6
5
75
15
13
90
18
15
ns 2.0
4.5
6.0
Fig.9
