NB3N51034
http://onsemi.com
8
APPLICATION INFORMATION
Crystal Input Interface
Figure 5 shows the NB3N51034 device crystal oscillator
interface using a typical parallel resonant crystal. The device
crystal connections should include pads for small capacitors
from X1 to ground and from X2 to ground. These capacitors,
C
1
and C
2
, need to consider the stray capacitances of the
board and are used to match the nominally required crystal
load capacitance C
L
. A parallel crystal with loading
capacitance C
L
= 18 pF would use C
1
= 26 pF and C
2
= 26 pF
as nominal values, assuming approximately 2 pF of stray
capacitance per trace and approximately 8 pF of internal
capacitance.
C
L
= (C
1
+ C
stray
+ C
in
) / 2; C
1
= C
2
The frequency accuracy and duty cycle skew can be
fine-tuned by adjusting the C
1
and C
2
values. For example,
increasing the C
1
and C
2
values will reduce the operational
frequency.
Figure 5. Crystal Interface Loading
C
1
= 26 pF
C
2
= 26 pF
X1
X2
Fundamental Mode
Parallel Resonant Crystal
18 pF Load
Power Supply Filter
In order to isolate the NB3N51034 from system power
supply, noise decoupling is required. The 10 mF and a 0.1 mF
cap from supply pins to GND decoupling capacitor has to be
connected between V
DD
(pins 1 and 15) and GND (pins 9
and 6). It is recommended to place decoupling capacitors as
close as possible to the device to minimize lead inductance.
Termination
The output buffer structure is shown in the Figure 6.
Figure 6. Simplified Output Structure
R
REF
CLKx CLKxIREF
2.6 mA
475 W
HCSL / LVDS
termination
14 mA