NCP81252
www.onsemi.com
14
Over Current Protection
The NCP81252 provides two different types of current
limit protection. Current limits are programmed with a
resistor RILIM between the CSCOMP pin and the ILIM pin.
The current from the ILIM pin to this resistor is then
compared to two internal currents (10 mA and 15 mA)
corresponding to two different current limit thresholds ILIM
and ILIM_Fast (150% of ILIM level). If the ILIM pin
current exceeds the 10 mA level, an internal latch−off timer
starts. The controller shuts down if the fault is not removed
after 50 ms. If the current into the pin exceeds 15 mA the
controller will shut down immediately. To recover from an
OCP fault the EN pin must be cycled low.
The value of RILIM can be designed using the following
equation with a required over current protection threshold
ILIM and a known current−sense network.
R
ILIM
+
V
CS
@I
LIM
10 m
+
R
CS
R
CS3
@ I
LIM_PK
@ DCR @ 10
5
(eq. 7)
+
R
CS
R
CS3
@
ǒ
I
LIM
)
ǒ
V
IN
* V
OUT
Ǔ
@ V
OUT
2 @ L @ F
SW
@ V
IN
Ǔ
@ DCR @ 10
5
ICC_MAX
A resistor connected from IMAX pin to ground sets
ICC_MAX value at startup. A 10 mA current is sourced from
this pin to generate a voltage on the program resistor. The
resistor value can be determined by the following equation.
The resistor value should be no less than 10 k.
ICC_MAX +
R
ICCMAX
@ 10 m @ 64
2
+ R
ICCMAX
@ 3.2 @ 10
−4
(eq. 8)
IOUT
The IOUT pin sources a current equal to the ILIM sink
current gained by the IOUT Current Gain (10 typ.). The
voltage of the IOUT pin is monitored by the internal A/D
converter and should be scaled with an external resistor to
ground such that a load equal to ICCMAX generates a 2 V
signal on IOUT. A pull−up resistor to 5 V V
CC
can be used
to offset the IOUT signal positive if needed.
R
IOUT
+
2
10 @ V
CS
@ICC_MAX
@ R
ILIM
(eq. 9)
+
1
5 @
R
CS
R
CS3
@ ICC_MAX @ DCR
@ R
ILIM
Input UVLO Protection
NCP81252 monitors supply voltages at the VCC pin and
the VIN pins in order to provide under voltage protection. If
either supply drops below its threshold, the controller will
shut down the outputs. Upon recovery of the supplies, the
controller reenters its startup sequence, and soft start begins.
Output Under−Voltage Protection
The output voltage is monitored by a dedicated
differential amplifier. If the output falls below target by
more than “Under Voltage Threshold below DAC−Droop”,
the UVL comparator sends the VR_RDY signal low.
Output Over−Voltage Protection
During normal operation the output voltage is monitored
at the differential inputs VSP and VSN. If the output voltage
exceeds the DAC voltage by “Over Voltage Threshold above
DAC”, GH will be forced low, and GL will go high. After the
OVP trips, the DAC ramps slowly down to zero to avoid a
negative output voltage spike during shutdown. If the
DAC+OVP Threshold drops below the output, GL will
again go high, and will toggle between low and high as the
output voltage follows the DAC+OVP Threshold down.
When the DAC gets to zero, the GH will be held low and the
GL will remain high. To reset the part, the EN pin must be
cycled low. During soft−start, the OVP threshold is set to
2.9 V. This allows the controller to start up without false
triggering the OVP.
(a) Normal Operation Mode
(b) During Start Up
Figure 8. Function of Over Voltage Protection