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ISL6115AIBZ-T7A

P1-P3P4-P6P7-P9P10-P10
1
ISL6115A
12V Power Distribution Controllers
ISL6115A
This fully featured hot swap power controller targets
+12V applications. The ISL6115A with its integrated
charge pump has a higher (6.5V vs 5V) gate drive
than its sister part the ISL6115 making this part an
immediate efficiency improvement replacement.
This IC features programmable overcurrent (OC)
detection, current regulation (CR) with time delay to
latch-off and soft-start.
The current regulation level is set by 2 external
resistors; R
ISET
sets the CR Vth and the other is a
low ohmic sense resistor across, which the CR Vth is
developed. The CR duration is set by an external
capacitor on the CTIM pin, which is charged with a
20µA current once the CR Vth level is reached. The
IC then quickly pulls down the GATE output latching
off the pass FET.
Features
• HOT SWAP Single Power Distribution Control for
+12V
• Overcurrent Fault Isolation
• Programmable Current Regulation Level
• Programmable Current Regulation Time to
Latch-Off
• Rail-to-Rail Common Mode Input Voltage Range
• Enhanced Internal Charge Pump Drives N-Channel
MOSFET gate to 6.5V above IC bias.
• Undervoltage and Overcurrent Latch Indicators
• Adjustable Turn-On Ramp
• Protection During Turn-On
• Two Levels of Overcurrent Detection Provide Fast
Response to Varying Fault Conditions
• 1µs Response Time to Dead Short
• Pb-Free (RoHS Compliant)
Applications
• Power Distribution Control
• Hot Plug Components and Circuitry
Application Circuits - High Side Controller
+12V
-
+
PWRON
LOAD
PGOOD
OC
1
2
3
4
8
7
6
5
ISL6115A
+V SUPPLY TO BE CONTROLLED
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2008, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
April 23, 2010
FN6855.1
2
FN6855.1
April 23, 2010
Simplified Block Diagram
Pin Configuration
ISL6115A
(8 LD SOIC)
TOP VIEW
+
-
I
SET
I
SEN
GATE
V
SS
V
DD
CTIM
PGOOD
PWRON
CLIM
WOCLIM
ENABLE
OC
10µA
FALLING
EDGE
DELAY
18V
+
-
V
REF
+
-
1.86V
12V
+
-
R
R
S
QN
Q
ENABLE
POR
V
DD
8V
RISING
EDGE
PULSE
+
-
+
-
UV
18V
20µA
7.5k
+
-
+
-
20µA
UV DISABLE
ISET
ISEN
GATE
VSS
1
2
3
4
8
7
6
5
PWRON
PGOOD
CTIM
VDD
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
TEMPERATURE
RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL6115AIBZ 6115A IBZ -40 to +85 8 Ld SOIC M8.15
ISL6115AIBZ-T (Notes 1, ) 6115A IBZ -40 to +85 8 Ld SOIC M8.15
ISL6115ACBZ 6115A CBZ 0 to +70 8 Ld SOIC M8.15
ISL6115ACBZ-T (Notes 1, ) 6115A CBZ 0 to +70 8 Ld SOIC M8.15
ISL6115AEVAL1Z Evaluation Platform
NOTES:
1. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6115A
. For more information on MSL please
see techbrief TB363
.
ISL6115A
3
FN6855.1
April 23, 2010
Pin Descriptions
PIN
NO. SYMBOL FUNCTION DESCRIPTION
1 ISET Current Set Connect to the low side of the current sense resistor through the current limiting set resistor.
This pin functions as the current limit programming pin.
2 ISEN Current Sense Connect to the more positive end of sense resistor to measure the voltage drop across this
resistor.
3GATEExternal FET Gate
Drive Pin
Connect to the gate of the external N-Channel MOSFET. A capacitor from this node to
ground sets the turn-on ramp. At turn-on this capacitor will be charged to V
DD
+6.5V
by an 14µA current source.
4 VSS Chip Return
5 VDD Chip Supply 12V chip supply. This can be either connected directly to the +12V rail supplying the
switched load voltage or to a dedicated V
SS
+12V supply.
6 CTIM Current Limit Timing
Capacitor
Connect a capacitor from this pin to ground. This capacitor determines the time delay
between an overcurrent event and chip output shutdown (current limit time-out). The
duration of current limit time-out is equal to 93kΩ x C
TIM
.
7 PGOOD Power Good Indicator Indicates that the voltage on the ISEN pin is satisfactory. PGOOD is driven by an open
drain N-Channel MOSFET and is pulled low when the output voltage (VISEN) is less than
the UV level for the particular IC.
8 PWRON Power-ON PWRON is used to control and reset the chip. The chip is enabled when PWRON pin is
driven high to a maximum of 5V or is left open. Do not drive this input >5V. After a
current limit time-out, the chip is reset by a low level signal applied to this pin. This input
has 20µA pull-up capability.
ISL6115A
P1-P3P4-P6P7-P9P10-P10

ISL6115AIBZ-T7A

Mfr. #:
Buy ISL6115AIBZ-T7A
Manufacturer:
Renesas / Intersil
Description:
Hot Swap Voltage Controllers Pb-Free w/Anneal 8 LD SOIC, +12V SINGLE HOT PLUG CONTROLLER,
Lifecycle:
New from this manufacturer.
Delivery:
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