ADN4691E/ADN4693E/ADN4696E/ADN4697E Data Sheet
Rev. B | Page 16 of 20
APPLICATIONS INFORMATION
M-LVDS extends the low power, high speed, differential signaling
of low voltage differential signaling (LVDS) to multipoint systems
where multiple nodes are connected over short distances in a
bus topology network.
With M-LVDS, a transmitting node drives a differential signal
across a transmission medium such as a twisted pair cable. The
transmitted differential signal allows other receiving nodes that
are connected along the bus to detect a differential voltage that
can then be converted back into a single-ended logic signal by
the receiver.
The communication line is typically terminated at both ends
by resistors (R
T
), the value of which is chosen to match the
characteristic impedance of the medium (typically 100 Ω).
For half-duplex multipoint applications such as the one shown
in Figure 37, only one driver can be enabled at any time. Full-
duplex nodes allow a master-slave topology as shown in Figure 38.
In this configuration, a master node can concurrently send and
receive data to/from slave nodes. At any time, only one slave
node can have a driver enabled to concurrently transmit data
back to the master node.
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. R
T
IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
A B
R
D
R
T
R
T
ADN4696E
DE DI
RO RE
A B
ADN4696E
DE DI
RO RE
A B
ADN4696E
DE DI
RO RE
A B
ADN4696E
DE DI
10355-037
R
D
R
D
R
D
R
D
R
D
R
D
R
D
Figure 37. ADN4696E Typical Half-Duplex M-LVDS Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. R
T
IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
A B Z Y
MASTER SLAVE SLAVE SLAVE
R
T
R
T
ADN4697E
DE DI RO RE DE DI RO RE DE DI
A B Z Y
ADN4697E
A B Z Y
ADN4697E
A B Z Y
ADN4697E
R
T
R
T
RO RE DE DI
10355-038
R
D
R
D
R
D
R
D
Figure 38. ADN4697E Typical Full-Duplex M-LVDS Master-Slave Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
Data Sheet ADN4691E/ADN4693E/ADN4696E/ADN4697E
Rev. B | Page 17 of 20
OUTLINE DIMENSIONS
CO
N
TR
OLLING DIMEN
S
IO
NS
A
RE
IN
M
IL
LI
M
ET
E
RS
; I
N
CH
DI
M
EN
SI
O
NS
(I
N
PA
RE
N
TH
ESES) ARE ROU
N
DE
D-
O
FF
M
IL
LI
M
ET
ER
E
QU
IV
A
LE
N
TS
FO
R
R
E
FE
RE
N
CE
ON
L
Y A
ND ARE NOT APP
R
OP
R
IA
TE
F
OR
US
E
IN
DE
S
IG
N
.
C
OM
PL
I
AN
T T
O
JE
D
EC
ST
A
ND
AR
D
S M
S-
0
12
-
AA
012407-A
0.
25
(
0.
00
9
8)
0.
17
(
0.
0
06
7)
1
.
27
(0
.
05
00
)
0
.
40
(0
.
01
5
7)
0
.5
0 (
0
.0
19
6
)
0.
25
(
0.
0
09
9)
4
5
°
8
°
0
°
1
.
75
(0
.
06
88
)
1
.
35
(
0.
05
3
2)
S
EA
TI
N
G
P
LA
N
E
0
.2
5 (
0
.0
0
98
)
0.
1
0 (
0.
0
04
0)
4
1
8
5
5
.0
0
(0
.1
9
68
)
4.
8
0 (
0.
1
89
0)
4
.0
0
(0
.1
5
74
)
3
.
80
(0
.
14
97
)
1.
27
(
0.
05
0
0)
B
SC
6
.
20
(0
.
24
4
1)
5
.8
0 (
0
.2
2
8
4
)
0
.5
1
(0
.0
2
01
)
0.
3
1 (
0
.0
12
2
)
C
OP
L
AN
A
RI
TY
0
.
10
Figure 39. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
060606-A
14
8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
45°
Figure 40. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
ADN4691EBRZ 40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADN4691EBRZ-RL7 40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADN4693EBRZ 40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADN4693EBRZ-RL7 40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADN4696EBRZ 40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADN4696EBRZ-RL7 40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADN4697EBRZ 40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADN4697EBRZ-RL7 40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
EVAL-ADN469xEHDEBZ Evaluation Board for Half-Duplex (ADN4691E/ADN4696E)
EVAL-ADN469xEFDEBZ Evaluation Board for Full-Duplex (ADN4693E/ADN4697E)
1
Z = RoHS Compliant Part.
ADN4691E/ADN4693E/ADN4696E/ADN4697E Data Sheet
Rev. B | Page 18 of 20
NOTES

ADN4691EBRZ-RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
LVDS Interface IC MLVDS Xcvr,HD,200M Type 1 Rx,EnhancedESD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union