2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit
nanoDAC, SPI Interface in LFCSP and SC70
Data Sheet
AD5601/AD5611/AD5621
Rev. H Document Feedback
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FEATURES
6-lead SC70 and LFCSP packages
Micropower operation: 100 μA maximum at 5 V
Power-down typically to 0.2 μA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to 0 V with brownout detection
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
On-chip output buffer amplifier, rail-to-rail operation
SYNC
interrupt facility
Minimized zero-code error
AD5601 buffered 8-bit DAC
B version: ±0.5 LSB INL
AD5611 buffered 10-bit DAC
B version: ±0.5 LSB INL
A version: ±4 LSB INL
AD5621 buffered 12-bit DAC
B version: ±1 LSB INL
A version: ±6 LSB INL
APPLICATIONS
Voltage level setting
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5601/AD5611/AD5621, members of the nanoDAC®
family, are single, 8-/10-/12-bit, buffered voltage output DACs
that operate from a single 2.7 V to 5.5 V supply, consuming
typically 75 μA at 5 V. The parts come in tiny LFCSP and SC70
packages. Their on-chip precision output amplifier allows rail-
to-rail output swing to be achieved. The AD5601/AD5611/
AD5621 utilize a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and is compatible with SPI, QSPI™,
MICROWIRE™, and DSP interface standards.
The reference for the AD5601/AD5611/AD5621 is derived
from the power supply inputs and, therefore, gives the widest
dynamic output range. The parts incorporate a power-on reset
circuit, which ensures that the DAC output powers up to 0 V
and remains there until a valid write to the device takes place.
The AD5601/AD5611/AD5621 contain a power-down feature
that reduces current consumption to typically 0.2 μA at 3 V.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
Table 1. Related Devices
Part Number Description
AD5641
2.7 V to 5.5 V, <100 μA, 14-bit nanoDAC in
SC70 and LFCSP packages
They also provide software-selectable output loads while in
power-down mode. The parts are put into power-down mode
over the serial interface.
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equip-
ment. The combination of small package and low power makes
these nanoDAC devices ideal for level-setting requirements,
such as generating bias or control voltages in space-constrained
and power-sensitive applications.
PRODUCT HIGHLIGHTS
1. Available in 6-lead LFCSP and SC70 packages.
2. Low power, single-supply operation. The AD5601/
AD5611/AD5621 operate from a single 2.7 V to 5.5 V
supply with a maximum current consumption of 100 μA,
making them ideal for battery-powered applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a typical slew rate of
0.5 V/μs.
4. Reference is derived from the power supply.
5. High speed serial interface with clock speeds up to
30 MHz. Designed for very low power consumption.
The interface powers up only during a write cycle.
6. Power-down capability. When powered down, the DAC
typically consumes 0.2 μA at 3 V. Power-on reset with
brownout detection.
AD5601/AD5611/AD5621
V
DD
V
OUT
GND
POWER-ON
RESET
DAC
REGISTER
12-/10-/8-BIT
DAC
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
OUTPUT
BUFFER
RESISTOR
NETWORK
REF(+)
SCLK SDIN
06853-001
SYNC
AD5601/AD5611/AD5621 Data Sheet
Rev. H | Page 2 of 21
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Terminology .................................................................................... 13
Theory of Operation ...................................................................... 14
DAC Section ................................................................................ 14
Resistor String ............................................................................. 14
Output Amplifier ........................................................................ 14
Serial Interface ............................................................................ 14
Input Shift Register .................................................................... 14
SYNC
Interrupt .......................................................................... 14
Power-On Reset .......................................................................... 16
Power-Down Modes .................................................................. 16
Microprocessor Interfacing ....................................................... 16
Applications Information .............................................................. 18
Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 ....................................................... 18
Bipolar Operation Using the AD5601/AD5611/AD5621 ..... 18
Using the AD5601/AD5611/AD5621 with a Galvanically
Isolated Interface ........................................................................ 19
Power Supply Bypassing and Grounding ................................ 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 21
REVISION HISTORY
2/16—Rev. G to Rev. H
Changes to Noise Parameter, Table 2 ............................................. 3
Changes to Serial Interface Section .............................................. 14
6/13—Rev. F to Rev. G
Change to Ordering Guide ............................................................ 21
2/12—Rev. E to Rev. F
Added 6-Lead LFCSP ......................................................... Universal
Changes to Features Section, General Description Section,
Table 1, and Product Highlights Section ....................................... 1
Changes to Table 4 ............................................................................ 5
Added Figure 4; Renumbered Sequentially .................................. 6
Changes to Table 5 ............................................................................ 6
Changes to Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 Section .............................................. 18
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 21
7/10—Rev. D to Rev. E
Changes to Figure 1 .......................................................................... 1
5/08—Rev. C to Rev. D
Changes to General Description Section ...................................... 1
Changes to Table 2 ............................................................................ 3
Changes to Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 Section .............................................. 18
Changes to Ordering Guide .......................................................... 20
12/07—Rev. B to Rev. C
Changes to Features .......................................................................... 1
Changes to Table 2 ............................................................................. 3
Changes to AD5601/AD5611/AD5621 to ADSP-2101
Interface Section ............................................................................. 16
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 20
7/05—Rev. A to Rev. B
Changes to Figure 48...................................................................... 17
Changes to Galvanically Isolated Interface Section ................... 19
Changes to Figure 52...................................................................... 19
3/05—Rev. 0 to Rev. A
Changes to Timing Characteristics ................................................. 4
Changes to Absolute Maximum Ratings ........................................ 5
Changes to Full Scale Error Section ................................................ 7
Changes to Figure 20...................................................................... 10
Changes to Theory of Operation .................................................. 14
Changes to Power Down Modes .................................................. 15
1/05—Revision 0: Initial Version
Data Sheet AD5601/AD5611/AD5621
Rev. H | Page 3 of 21
SPECIFICATIONS
V
DD
= 2.7 V to 5.5 V; R
L
= 2 kΩ to GND; C
L
= 200 pF to GND; all specifications T
MIN
to T
MAX
, unless otherwise noted. Temperature range
for A/B grades is −40°C to +125°C, typical at 25°C.
Table 2.
A Grade B Grade
Parameter Min Typ Max Min Typ Max Unit Test Conditions/Comments
STATIC PERFORMANCE
AD5601
Resolution 8 Bits
Relative Accuracy
1
(INL) ±0.5 LSB
Differential Nonlinearity (DNL) ±0.5 LSB Guaranteed monotonic by design
AD5611
Resolution 10 Bits
Relative Accuracy
1
(INL) ±4 ±0.5 LSB
Differential Nonlinearity (DNL) ±0.5 ±0.5 LSB Guaranteed monotonic by design
AD5621
Resolution 12 Bits
Relative Accuracy
1
(INL) ±6 ±1 LSB
Differential Nonlinearity (DNL) ±0.5 ±0.5 LSB Guaranteed monotonic by design
Zero-Code Error 0.5 10 0.5 10 mV All 0s loaded to DAC register
Full-Scale Error ±0.5 ±0.5 mV All 1s loaded to DAC register
Offset Error ±0.063 ±10 ±0.063 ±10 mV
Gain Error ±0.0004 ±0.037 ±0.0004 ±0.037 %FSR
Zero-Code Error Drift 5.0 5.0 μV/°C
Gain Temperature Coefficient 2.0 2.0
ppm
FSR/°C
OUTPUT CHARACTERISTICS
2
Output Voltage Range 0 V
DD
0 V
DD
V
Output Voltage Settling Time 6 10 6 10 μs Code ¼ scale to ¾ scale
Slew Rate 0.5 0.5 V/μs
Capacitive Load Stability 470 470 pF R
L
= ∞
1000 1000 pF R
L
= 2 kΩ
Output Noise Spectral Density 120 120
nV/Hz
DAC code = midscale,1 kHz
Noise 2 2 μV p-p
DAC code = midscale,
0.1 Hz to 10 Hz bandwidth
Digital-to-Analog Glitch Impulse 5 5 nV-s 1 LSB change around major carry
Digital Feedthrough 0.2 0.2 nV-s
Short-Circuit Current 15 15 mA V
DD
= 3 V/5 V
DC Output Impedance 0.5 0.5 Ω
LOGIC INPUTS
Input Current
3
±2 ±2 μA
Input High Voltage, V
INH
1.8 1.8 V V
DD
= 4.7 V to 5.5 V
1.4 1.4 V V
DD
= 2.7 V to 3.6 V
Input Low Voltage, V
INL
0.8 0.8 V V
DD
= 4.7 V to 5.5 V
0.6 0.6 V V
DD
= 2.7 V to 3.6 V
Pin Input Capacitance 3 3 pF

AD5621AKSZ-500RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC SGL 2.7-5.5V 12Bit
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New from this manufacturer.
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