MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
22 ______________________________________________________________________________________
Figure
10 shows the MAX6061 precision bandgap ref-
erence used as a common reference for multiple con-
verters. The 1.248V output of the MAX6061 is divided
down to 1.023V as it passes through a one-pole, 10Hz,
lowpass filter to the MAX4250. The MAX4250 buffers
the 1.023V reference before its output is applied to the
MAX1192. The MAX4250 provides a low offset voltage
(for high gain accuracy) and a low noise level.
Unbuffered External Reference Drives
Multiple ADCs
The unbuffered external reference mode allows for pre-
cise control over the MAX1192 reference and allows
multiple converters to use a common reference.
Connecting REFIN to GND disables the internal refer-
ence, allowing REFP, REFN, and COM to be driven
directly by a set of external reference sources.
MAX4250
3V
2
4
2
1.248V
3
5
10Hz
LOWPASS
FILTER
1
15Ω
1
REFIN
V
DD
MAX1192
N = 1
24
GND
1.023V
NOTE: ONE FRONT-END REFERENCE
CIRCUIT PROVIDES ±15mA OF OUTPUT
DRIVE AND SUPPORTS OVER
1000 MAX1192s.
3
0.1μF
0.1μF
3V
1μF
1%
20kΩ
1%
90.9kΩ
0.1μF
2.2μF
0.1μF
REFP
27
0.33μF
REFN
26
0.33μF
COM
25
0.33μF
REFIN
V
DD
MAX1192
N = 1000
24
GND
0.1μF
REFP
27
0.33μF
REFN
26
0.33μF
COM
25
0.33μF
MAX6061
Figure 10. External Buffered (MAX4250) Reference Drive Using a MAX6062 Bandgap Reference
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
______________________________________________________________________________________ 23
Figure
11 shows the MAX6066 precision bandgap ref-
erence used as a common reference for multiple con-
verters. The 2.500V output of the MAX6066 is followed
by a 10Hz lowpass filter and precision voltage-divider.
The MAX4254 buffers the taps of this divider to provide
the 1.75V, 1.5V, and 1.25V sources to drive REFP,
REFN, and COM. The MAX4254 provides a low offset
voltage and low noise level. The individual voltage fol-
lowers are connected to 10Hz lowpass filters, which fil-
ter both the reference-voltage and amplifier noise to a
level of 3nV/Hz. The 1.75V and 1.25V reference volt-
ages set the differential full-scale range of the associat-
ed ADCs at ±0.5V.
The common power supply for all active components
removes any concern regarding power-supply
sequencing when powering up or down.
With the outputs of the MAX4252 matching better than
0.1%, the buffers and subsequent lowpass filters sup-
port as many as 160 MAX1192s.
MAX4254
1/4
47Ω
3V
2
2
2.500V
3
1
1
REFP
V
DD
MAX1192
N = 1
27
GND
NOTE: ONE FRONT-END
REFERENCE CIRCUIT
SUPPORTS UP TO 160 MAX1192s
3
0.1μF
10μF
6V
1μF
1%
30.1kΩ
1%
10.0kΩ
0.1μF
2.2μF
330μF
6V
0.33μF
26
24
0.33μF
REFN
REFIN
REFIN
25
0.33μF
COM
MAX6066
1.748V
1%
10.0kΩ
1%
49.9kΩ
REFP
V
DD
MAX1192
N = 160
27
GND
0.33μF
26
24
0.33μF
REFN
25
0.33μF
COM
1.47kΩ
MAX4254
47Ω
6
5
7
10μF
6V
330μF
6V
1.498V
1.47kΩ
47Ω
9
10
8
10μF
6V
330μF
6V
1.248V
MAX4254
1.47kΩ
1MΩ
MAX4254
13
12
14
11
4
0.1μF
UNCOMMITTED
1MΩ
3V
1/4
1/4
1/4
Figure 11. External Unbuffered Reference Driving 160 ADCs with MAX4254 and MAX6066
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
24 ______________________________________________________________________________________
Typical QAM Demodulation Application
Quadrature amplitude modulation (QAM) is frequently
used in digital communications. Typically found in
spread-spectrum-based systems, a QAM signal repre-
sents a carrier frequency modulated in both amplitude
and phase. At the transmitter, modulating the baseband
signal with quadrature outputs, a local oscillator fol-
lowed by subsequent upconversion can generate the
QAM signal. The result is an in-phase (I) and a quadra-
ture (Q) carrier component, where the Q component is
90° phase shifted with respect to the in-phase compo-
nent. At the receiver, the QAM signal is demodulated
into analog I and Q components. Figure 12 displays the
demodulation process performed in the analog domain
using the MAX1192 dual-matched, 3V, 8-bit ADC and
the MAX2451 quadrature demodulator to recover and
digitize the I and Q baseband signals. Before being dig-
itized by the MAX1192, the mixed-down signal compo-
nents can be filtered by matched analog filters, such as
Nyquist or pulse-shaping filters. The filters remove
unwanted images from the mixing process, thereby
enhancing the overall signal-to-noise (SNR) perfor-
mance and minimizing intersymbol interference.
Grounding, Bypassing,
and Board Layout
The MAX1192 requires high-speed board layout design
techniques. Refer to the MAX1193 Evaluation Kit data
sheet for a board layout reference. Locate all bypass
capacitors as close to the device as possible, prefer-
ably on the same side as the ADC, using surface-
mount devices for minimum inductance. Bypass V
DD
to
GND with a 0.1µF ceramic capacitor in parallel with a
2.2µF bipolar capacitor. Bypass OV
DD
to OGND with a
0.1µF ceramic capacitor in parallel with a 2.2µF bipolar
capacitor. Bypass REFP, REFN, and COM each to
GND with a 0.33µF ceramic capacitor.
Multilayer boards with separated ground and power
planes produce the highest level of signal integrity. Use
a split ground plane arranged to match the physical
location of the analog ground (GND) and the digital
output driver ground (OGND) on the ADC’s package.
Connect the MAX1192 exposed backside paddle to
GND. Join the two ground planes at a single point such
that the noisy digital ground currents do not interfere
with the analog ground plane. The ideal location of this
connection can be determined experimentally at a
point along the gap between the two ground planes,
which produces optimum results. Make this connection
with a low-value, surface-mount resistor (1Ω to 5Ω), a
ferrite bead, or a direct short. Alternatively, all ground
pins could share the same ground plane, if the ground
plane is sufficiently isolated from any noisy, digital sys-
tems ground plane (e.g., downstream output buffer or
DSP ground plane).
Route high-speed digital signal traces away from the
sensitive analog traces of either channel. Make sure to
isolate the analog input lines to each respective con-
verter to minimize channel-to-channel crosstalk. Keep
all signal lines short and free of 90° turns.
0°
90°
÷
8
DOWNCONVERTER
MAX2451
INA+
MAX1192
INA-
INB+
INB-
DSP
POST-
PROCESSING
A/B
Figure 12. Typical QAM Receiver Application

MAX1192ETI+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 8-Bit 2Ch 22Msps 3.6V Precision ADC
Lifecycle:
New from this manufacturer.
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