Setting the Switching Frequency
The controller generates the clock signal by dividing
down the internal oscillator or SYNC input signal when
driven by an external oscillator, so the switching frequen-
cy equals half the oscillator frequency (f
SW
= f
OSC
/2).
The internal oscillator frequency is set by a resistor
(R
OSC
) connected from OSC to GND. The relationship
between f
SW
and R
OSC
is:
where f
SW
is in Hz, f
OSC
is in Hz, and R
OSC
is in Ω. For
example, a 600kHz switching frequency is set with
R
OSC
= 10kΩ. Higher frequencies allow designs with
lower inductor values and less output capacitance.
Consequently, peak currents and I
2
R losses are lower
at higher switching frequencies, but core losses, gate-
charge currents, and switching losses increase.
A rising clock edge on SYNC is interpreted as a syn-
chronization input. If the SYNC signal is lost, the inter-
nal oscillator takes control of the switching rate,
returning the switching frequency to that set by R
OSC
.
This maintains output regulation even with intermittent
SYNC signals. When an external synchronization signal
is used, R
OSC
should set the switching frequency to
one half SYNC rate (f
SYNC
).
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX1875/MAX1876: inductance
value (L), peak-inductor current (I
PEAK
), and DC resis-
tance (R
DC
). The following equation assumes a constant
ratio of inductor peak-to-peak AC current to DC average
current (LIR). For LIR values too high, the RMS currents
are high, and therefore I
2
R losses are high. Large induc-
tances must be used to achieve very low LIR values.
Typically inductance is proportional to resistance (for a
given package type) which again makes I
2
R losses high
for very low LIR values. A good compromise between
size and loss is a 30% peak-to-peak ripple current to
average-current ratio (LIR = 0.3). The switching frequen-
cy, input voltage, output voltage, and selected LIR
determine the inductor value as follows:
where V
IN
, V
OUT
, and I
OUT
are typical values (so that
efficiency is optimum for typical conditions). The switch-
ing frequency is set by R
OSC
(see the Setting the
Switching Frequency section). The exact inductor value
is not critical and can be adjusted in order to make
trade-offs among size, cost, and efficiency. Lower
inductor values minimize size and cost, but also
improve transient response and reduce efficiency due
to higher peak currents. On the other hand, higher
inductance increases efficiency by reducing the RMS
current. However, resistive losses due to extra wire turns
can exceed the benefit gained from lower AC current
levels, especially when the inductance is increased
without also allowing larger inductor dimensions.
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. The
inductor’s saturation rating must exceed the peak-
inductor current at the maximum defined load current
(I
LOAD(MAX)
):
Setting the Valley Current Limit
The minimum current-limit threshold must be high
enough to support the maximum expected load current
with the worst-case low-side MOSFET on-resistance
value since the low-side MOSFET’s on-resistance is
used as the current-sense element. The inductor’s valley
current occurs at I
LOAD(MAX)
minus half of the ripple
current. The current-sense threshold voltage (V
ITH
)
should be greater than voltage on the low-side MOSFET
during the ripple-current valley:
where R
DS(ON)
is the on-resistance of the low-side
MOSFET (N
L
). Use the maximum value for R
DS(ON)
from the low-side MOSFET’s data sheet, and additional
margin to account for R
DS(ON)
rise with temperature is
also recommended. A good general rule is to allow
0.5% additional resistance for each °C of the MOSFET
junction temperature rise.
Connect ILIM_ to VL for the default 100mV (typ) cur-
rent-limit threshold. For an adjustable threshold, con-
nect a resistor (R
ILIM
_) from ILIM_ to GND. The
relationship between the current-limit threshold (V
ITH
_)
and R
ILIM
_ is:
where R
ILIM
_ is in Ω and V
ITH
_ is in V.
