AD7874
REV. C
–3–
TIMING CHARACTERISTICS
1
Parameter A, B Versions S Version Units Conditions/Comments
t
1
50 50 ns min CONVST Pulse Width
t
2
0 0 ns min CS to RD Setup Time
t
3
60 70 ns min RD Pulse Width
t
4
0 0 ns min CS to RD Hold Time
t
5
60 60 ns max RD to INT Delay
t
6
2
57 70 ns max Data Access Time after RD
t
7
3
55ns min Bus Relinquish Time after RD
45 50 ns max
t
8
130 150 ns min Delay Time between Reads
t
CONV
31 31 µs min CONVST to INT, External Clock
32.5 32.5 µs max
CONVST to INT, External Clock
31 31 µs min
CONVST to INT, Internal Clock
35 35 µs max
CONVST to INT, Internal Clock
t
CLK
10 10 µs max Minimum Input Clock Period
NOTES
1
Timing Specifications in bold print are 100% production tested. All other times are sample tested at +25°C to ensure compliance. All input signals are specified with
tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2
t
6
is measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3
t
7
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 2. The measured number is then extrapolated
back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
7
, quoted in the timing characteristics is the true bus relinquish
time of the part and as such is independent of external bus loading capacitances.
Specifications subject to change without notice.
(V
DD
= +5 V 6 5%, V
SS
= –5 V 6 5%, AGND = DGND = O V, t
CLK
= 2.5 MHz external unless
otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V
AGND to DGND . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
V
IN
to AGND . . . . . . . . . . . . . . . . . . . . . . . . .–15 V to +15 V
REF OUT to AGND . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
DD
Digital Inputs to DGND . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Outputs to DGND . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
Power Dissipation (Any Package) to +75°C . . . . . . 1,000 mW
Derates above +75°C by . . . . . . . . . . . . . . . . . . . . 10 mW/°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
TO OUTPUT
PIN
1.6mA
2.1V+
200µA
50pF
Figure 1. Load Circuit for Access Time
TO OUTPUT
PIN
1.6mA
2.1V+
200µA
50pF
Figure 2. Load Circuit for Bus Relinquish Time
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7874 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
