BelaSigna R262
www.onsemi.com
13
Microphone Placement & Selection
The flexibility of the BelaSigna R262 noise reduction
algorithm doesn’t restrict microphone placements, but the
default algorithm will operate optimally with
omnidirectional microphones placed in the following
configuration:
The two microphones are facing the users mouth
The microphone centers are located within 10 to 25 mm
from each other
As mentioned, other configurations that differ from the
above guidelines are supported. For example, a 15 cm
distance between the two microphones will not degrade the
performance as long as the microphones are both facing the
users mouth. Alternatively, a configuration with one
microphone at the front and one microphone at the back will
not degrade the performance either, as long as the distance
between the microphones is no more than 2 cm.
BelaSigna R262 does not require any acoustic
microphone calibration procedure.
When selecting microphones to be used with
BelaSigna R262, the following guidelines should be used:
Two omni−directional microphones with similar
characteristics should be used
The microphone sensitivity should be approximately
−42 dB (where 0 dB = 1 V/Pa, at 1 kHz)
The microphones are two−terminal microphones
The microphone power supply is either 1 V
(recommended), or 2 V if it is to be provided by
BelaSigna R262
The dynamic range of BelaSigna R262 on its analog
input channels is 2.0 V peak−to−peak, after
amplification by the default gain value of 24 dB using
BelaSigna R262’s input preamplifiers
When higher sensitivity microphones are used, the
preamp gain should be adjusted to match the 2.0 Vpp
input voltage swing on BelaSigna R262, but this will
require special configuration of the ROM application,
as described later. As an example, using microphones
with a −22 dB sensitivity typically requires that the
preamplifier gains be changed down to 12 dB.
When MEMS microphone are to be used, a general
increase of the algorithm performance can be expected
due to the improved self noise of these microphones,
compared to conventional electret microphones. For
applications requiring microphone configurations
differing significantly from the above recommendations,
contact your local ON Semiconductor support
representative.
Operating Modes
The default application stored in the ROM of
BelaSigna R262 has four Operating Modes. The Operating
Modes are summarized in Table 7.
Table 7. OPERATING MODES SUMMARY
Operating
Mode
Switching Description
Active Active mode can be entered at boot time,
depending on the BOOT_SEL configuration and
when exiting Sleep mode. Active mode can also
be entered via an I
2
C command from another
mode.
In Active mode, the noise reduction algorithm is executed. While
in Active mode, BelaSigna R262 collects statistics on the input
signals that can be retrieved via I
2
C. These signal statistics can
be used for level calibration and other debugging. For more
information using Active mode for calibration and debugging see
the BelaSigna R262 Communications and Configuration Guide.
Bypass Bypass mode can be entered at boot time,
depending on the BOOT_SEL configuration. It
can also be entered via an I
2
C command from
another mode.
In Bypass mode, no signal processing is done on the audio
inputs. The inputs are passed directly to the audio outputs. While
in Bypass mode, BelaSigna R262 collects statistics on the input
signals that can be retrieved via I
2
C. These signal statistics can
be used for level calibration and other debugging. For more
information using Bypass mode for calibration and debugging see
the BelaSigna R262 Communications and Configuration Guide.
Sleep Sleep mode can be entered via I
2
C commands.
When Sleep mode is entered via I
2
C, the chip will
exit Sleep mode only based on activity on the
I
2
C_SCL pin. Sleep mode will be automatically
entered if BelaSigna R262 detects that a required
external clock is no longer present. For more
information, see the Sleep Control section below.
In Sleep mode no signal processing is done. All analog blocks of
the chip are disabled and the digital core continues to run off an
internal low−speed oscillator, thereby allowing the external clock
to be disabled when the chip is asleep. This is BelaSigna R262’s
lowest power operating mode.
Stand−By Stand−By mode is an intermediate mode that is
only used when exiting sleep mode by an I
2
C
command.
When I
2
C is used to exit Sleep mode, the application will
transition to Stand−By mode, and will wait until the master I
2
C
device issues a Switch_Mode command to enter another
processing mode like Active or Bypass. If no such command is
issued, BelaSigna R262 will return to Sleep mode and wait for a
valid wake−up sequence.
BelaSigna R262
www.onsemi.com
14
Boot Control, Hardware Configuration and
Digital Control
At power−on−reset, BelaSigna R262 will normally
execute the application stored in ROM. During the boot
process, BelaSigna R262 will read voltage levels on four
different pins, which will determine the algorithm and
hardware configuration that will be executed. All the
configuration options are described later in this section; the
four pins are CLOCK_SEL, BOOT_SEL, CHAN_SEL and
ALPHA_SEL.
The BOOT_SEL pin controls the booting methods of
BelaSigna R262. The signal on this pin is sampled by
BelaSigna R262 during its booting process using a
low−speed A/D converter (LSAD). Based on the actual
voltage that the chip will read on this pin, it will
automatically select a particular booting configuration, as
described in Table 8.
Table 8. BOOT SELECTION OPTIONS (Note 4)
Preset Voltage Level Boot Method Description
0−2 0.65 − 1.00 V External Boot Mode In this mode, BelaSigna R262 will not run the ROM based applica-
tion. It will start looking for an SPI EEPROM to bootload a custom
application from. If unsuccessful, it will look for an I
2
C EEPROM to
bootload a custom application; and lastly, if neither of the two previ-
ous operations to find an EEPROM are successful, it will enter a
wait loop, allowing a master I
2
C device to start downloading a cus-
tom application (e.g. a baseband controller).
3 0.50 − 0.63 V Active Mode
Talking distance selectable from
Near− to Far−Talk
(50 cm to 500 cm)
The noise reduction algorithm is running and can be configured for
talking distances between 50 cm (Near−Talk) and 5 m (Far−Talk)
4 0.36 − 0.49 V Active Mode
Talking distance selectable from
Close− to Far−Talk
(5 cm to 500 cm)
The noise reduction algorithm is running and can be configured for
talking distances between 5 cm (Close−Talk) and 5 m (Far−Talk)
5 0.22 − 0.35 V Active Mode
Talking distance selectable from
Close− to Near−Talk
(5 cm to 100 cm)
The noise reduction algorithm is running and can be configured for
talking distances between 5 cm (Close−Talk) and 1 m (Near−Talk)
6 0.08 − 0.21 V Bypass Diagnostic Mode
1 kHz sine wave play−out
BelaSigna R262 outputs a pure tone on the two output channels.
This sine wave has a frequency of 1 kHz and an output level of
12 dB below full scale.
7 0 − 0.07 V Bypass Diagnostic Mode
Full stereo passthrough
BelaSigna R262 simply copies the input signals to the outputs.
4. For more details on the various operating modes of BelaSigna R262, please consult the BelaSigna R262 Communications and Configuration
Guide.
BelaSigna R262
www.onsemi.com
15
Clocking, Channels & Algorithm Configuration
As mentioned in the Boot Control section,
BelaSigna R262 is controlled by hardware configuration.
Just like the BOOT_SEL signal discussed earlier, the
CLOCK_SEL, CHAN_SEL and ALPHA_SEL pins are also
sampled by BelaSigna R262 during its booting process
using a low−speed A/D converters (LSAD). Based on the
actual voltage that the chip reads on these pins, it will
automatically select a particular clock, output stage,
channels and algorithm configuration, as described in
Tables 9, 10 and 11.
Table 9. CLOCK CONFIGURATION OPTIONS
Preset Voltage Level Clock Frequency Description
0−2 0.65 − 1.00 V 2.048 MHz A 2.048 MHz external clock is expected to be present on the EXT_CLK pin of
BelaSigna R262
3 0.50 − 0.63 V 2.4 MHz A 2.4 MHz external clock is expected to be present on the EXT_CLK pin of
BelaSigna R262
4 0.36 − 0.49 V 2.8 MHz A 2.8 MHz external clock is expected to be present on the EXT_CLK pin of
BelaSigna R262
5 0.22 − 0.35 V 3.072 MHz A 3.072 MHz external clock is expected to be present on the EXT_CLK pin of
BelaSigna R262
6 0.08 − 0.21 V 26 MHz A 26 MHz external clock is expected to be present on the EXT_CLK pin of
BelaSigna R262
7 0 − 0.07 V Internal Oscillator BelaSigna R262 runs off its internal system clock. No clock signal must be
present on the EXT_CLK pin. In this mode the sampling frequency can fluctu-
ate slightly from one device to another; see the electrical characteristics for
additional details. The performance of the algorithm itself is fully guaranteed.
Table 10. CHANNEL CONFIGURATION OPTIONS
Preset Voltage Level NR Outputs Channel 0 Channel 1 Output Stage Configuration
0−2 0.65 − 1.00 V Single Start of Range
(as per BOOT_SEL)
N/A Mono,
Differential
3 0.50 − 0.63 V Dual Start of Range
(as per BOOT_SEL)
Mixed Output
(as per BOOT_SEL &
ALPHA_SEL)
Stereo,
Single Ended
4 0.36 − 0.49 V Dual Mixed Output
(as per BOOT_SEL &
ALPHA_SEL)
End of Range
(as per BOOT_SEL)
Stereo,
Single Ended
5 0.22 − 0.35 V Single Mixed Output
(as per BOOT_SEL &
ALPHA_SEL)
N/A Mono,
Differential
6 0.08 − 0.21 V Single Mixed Output
(as per BOOT_SEL &
ALPHA_SEL)
Algorithm Disabled Stereo,
Single Ended
7 0 − 0.07 V Single Algorithm Disabled Mixed Output
(as per BOOT_SEL &
ALPHA_SEL)
Stereo,
Single Ended
Table 11. MIXER CONFIGURATION OPTIONS
Preset Voltage Level Mixing Ratio
0−2 0.65 − 1.00 V 0% (Start of Range)
3 0.50 − 0.63 V 20% (Between Start and End of Range)
4 0.36 − 0.49 V 40% (Between Start and End of Range)
5 0.22 − 0.35 V 60% (Between Start and End of Range)
6 0.08 − 0.21 V 80% (Between Start and End of Range)
7 0 − 0.07 V 100% (End of Range)

BR262CPP01GEVK

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Audio DSPs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet