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STA016T
Description :
This register select the decoding data flux according
the mode written in following table.
RUN
:
Address : 0x56 (86)
Type : RW - DEC
Software Reset : 0
Description :
When a software reset occurs, register RUN
is reset (value 0) by the dsp (see I).
When boot routines are finished, the dsp
write inside RUN register the value 2 : this is
the start of the external configuration period
(start of DEC : see I).
When the external device wants to end the
external configuration period, it must write the
value 1 inside the register RUN: this is the run
command that starts the decoding process
(see I).
CRC_IGNORE :
Address : 0x52 (82)
Type : RW - ABO
Software Reset : 0
Description :
For decoders having CRC abilities (see each decod-
er configuration), if set to 0 enable the check of CRC,
if set to 1 disable the check of the CRC.
MUTE :
Address : 0x53 (83)
Type : RW - ABO
Software Reset : 0
Description :
For decoders having MUTE abilities (see each de-
coder configuration), if set to 0 disable the mute of the
decoder, if set to 1 enable the mute of the decoder.
Note that during a MUTE the input stream keeps on
entering.
SKIP :
Address : 0x57 (87)
Type : RW - ABO
Software Reset : 0
Description :
For data flux using USSB Input, if SKIP == n>2, de-
coder skip (n-1) out of n frames. Note that maximum
value for n is 8, and if n==0 or n==1, no frames is
skipped.
PAUSE
:
Address : 0x58 (88)
Type : RW - ABO
Bit(7:0) Mode
0 CD_MP3
1 CD_BYPASSA
2 RESERVED
3 BSB_MP3
4 BSB_ADPCM_DECODER
5 RESERVED
6 BSA_ADPCM_ENCODER
7 BSA_BYPASSA
8 I2Sin_ADPCM_ENC
9 I2Sin_BYPASSA
10 SINE (test mode chip alive)
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
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STA016T
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Software Reset : 0
Description :
For decoders having PAUSE abilities (see each de-
coder configuration), if set to 0 disable the pause of
the decoder, if set to 1 enable the pause of the de-
coder. Note that during a PAUSE the input stream is
stopped.
3.10 STATUS registers description
STATUS_MODE :
Address : 0xCC (204)
Type : RO - EDF
Software Reset : 0
Description :
This register give the type of the currently decoded
bitstream according following table.
STATUS_CHANS_NB :
Address : 0xCD (205)
Type : RO - EDF
Software Reset : 0
Description :
This register gives the number of channel currently
decoded.
STATUS_SF :
Address : 0xCE (206)
Type : RO - EDF
Software Reset : 0
Description :
This register gives the index of the sampling frequen-
cy of the stream currently decoded. Note that sam-
pling frequency indexes are given by table 5
STATUS_FE :
Address : 0x6F (111)
Type : RO - AEC
Software Reset : 0
Description :
This register give the status of the synchronization
process according following table.
b7 b6 b5 b4 b3 b2 b1 b0
Value Mode
0 MP3
1 MP3_25
2 RESERVED
3 RESERVED
4 RESERVED
5 ADPCM
6 RESERVED
7 BYPASS
8 RESERVED
9 RESERVED
10 RESERVED
11 MPG2
12 RESERVED
13 RESERVED
14 RESERVED
15 RESERVED
16 RESERVED
17 RESERVED
18 UNKNOWN
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Value Level
0 Syncrho not started
1 Syncword found
2 Syncword search
3 Syncword hard to find
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STA016T
HEADER _n:
Address : 0xD4 (212) to 0xD9 (217)
Type : RO - EDF
Software Reset : 0
Description :
This register give the nth byte of the header of the
frame currently decoded
3.11BYPASSA_CONFIGURATION registers
description
CHAN_NB :
Address : 0x70 (112)
Type : RW - DEC
Software Reset : 0
Description :
User must specify the number of channel for bypassa
decoder to decode.
SAMPLING_FREQ:
:
Address : 0x71 (113)
Type : RW - DEC
Software Reset : 0
Description :
User must specify the sampling frequency of the
stream to decode if clocks direction of the input inter-
face is input. Sampling frequency index is given by
table 4.
PCMCLK_INPUT :
Address : 0xCB (203)
Type : RW - DEC
Software Reset : 0
Description :
If set to 1, the PCMCLK pad is configure as input in
order to receive an external reference clock.
3.12 MP3_CONFIGURATION registers
description
ERR_DEC_LEVEL :
Address : 0x6B (107)
Type : RO - EDF
Software Reset : 0
Description :
This register give the status of the mp3 decoding pro-
cess according the error level written in following ta-
ble.
ERR_DEC_NB_1 :
Address : 0x6C (108)
Type : RO - EDF
Software Reset : 0
Description :
See ERR_DEC_NB_2 register description.
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Value Level
0 No error
1 Warning while decoding
2 Error while decoding
3 Fatal error while decoding
b7 b6 b5 b4 b3 b2 b1 b0
ER7 ER6 ER5 ER4 ER3 ER2 ER1 ER0
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STA016T

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC DECODER AUDIO 2.5 64TQFP
Lifecycle:
New from this manufacturer.
Delivery:
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