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STA016T
Description :
This register select the decoding data flux according
the mode written in following table.
RUN
:
Address : 0x56 (86)
Type : RW - DEC
Software Reset : 0
Description :
– When a software reset occurs, register RUN
is reset (value 0) by the dsp (see I).
– When boot routines are finished, the dsp
write inside RUN register the value 2 : this is
the start of the external configuration period
(start of DEC : see I).
– When the external device wants to end the
external configuration period, it must write the
value 1 inside the register RUN: this is the run
command that starts the decoding process
(see I).
CRC_IGNORE :
Address : 0x52 (82)
Type : RW - ABO
Software Reset : 0
Description :
For decoders having CRC abilities (see each decod-
er configuration), if set to 0 enable the check of CRC,
if set to 1 disable the check of the CRC.
MUTE :
Address : 0x53 (83)
Type : RW - ABO
Software Reset : 0
Description :
For decoders having MUTE abilities (see each de-
coder configuration), if set to 0 disable the mute of the
decoder, if set to 1 enable the mute of the decoder.
Note that during a MUTE the input stream keeps on
entering.
SKIP :
Address : 0x57 (87)
Type : RW - ABO
Software Reset : 0
Description :
For data flux using USSB Input, if SKIP == n>2, de-
coder skip (n-1) out of n frames. Note that maximum
value for n is 8, and if n==0 or n==1, no frames is
skipped.
PAUSE
:
Address : 0x58 (88)
Type : RW - ABO
Bit(7:0) Mode
0 CD_MP3
1 CD_BYPASSA
2 RESERVED
3 BSB_MP3
4 BSB_ADPCM_DECODER
5 RESERVED
6 BSA_ADPCM_ENCODER
7 BSA_BYPASSA
8 I2Sin_ADPCM_ENC
9 I2Sin_BYPASSA
10 SINE (test mode chip alive)
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Obsolete Product(s) - Obsolete Product(s)