Obsolete Product(s) - Obsolete Product(s)
STA016T
16/45
Description :
This register must contain a NDIV value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_XDIV_192
:
Address : 0xDF (223)
Type : RW - DEC
Software Reset : 3
Description :
This register must contain a XDIV value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_MDIV_192
:
Address : 0xE0 (224)
Type : RW - DEC
Software Reset : 12
Description :
This register must contain a MDIV value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_PEL_176
:
Address : 0xE1 (225)
Type : RW - DEC
Software Reset : 54
Description :
This register must contain a PEL value that enables
the audio PLL to generate a frequency of ofact*176
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
fact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_PEH_176
:
Address : 0xE2 (226)
Type : RW - DEC
Software Reset : 118
Description :
This register must contain a PEH value that enables
the audio PLL to generate a frequency of ofact*176
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_NDIV_176
:
Address : 0xE3 (227)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a NDIV value that enables
the audio PLL to generate a frequency of ofact*176
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Obsolete Product(s) - Obsolete Product(s)
Obsolete Product(s) - Obsolete Product(s)
17/45
STA016T
PLL_AUDIO_XDIV_176
:
Address : 0xE4 (228)
Type : RW - DEC
Software Reset : 2
Description :
This register must contain a XDIV value that enables
the audio PLL to generate a frequency of ofact*176
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_AUDIO_MDIV_176
:
Address : 0xE5 (229)
Type : RW - DEC
Software Reset : 8
Description :
This register must contain a MDIV value that enables
the audio PLL to generate a frequency of ofact*176
kHz for the PCMCK.See table 1,2 & 3.
Default value at soft reset assume :
–ofact == 256
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_CONFIGURATION registers de-
scription
PLL_SYSTEM_PEL_50
:
Address : 0xE6 (230)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a PEL value that enables
the system PLL to generate a frequency of 50 MHz
for the SYSCK. See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_PEH_50
:
Address : 0xE7 (231)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a PEH value that enables
the system PLL to generate a frequency of 50 MHz
for the SYSCK. See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_NDIV_50
:
Address : 0xE8 (232)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a NDIV value that enables
the system PLL to generate a frequency of 50 MHz
for the SYSCK. See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_XDIV_50
:
Address : 0xE9 (233)
Type : RW - DEC
Software Reset : 1
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Obsolete Product(s) - Obsolete Product(s)
Obsolete Product(s) - Obsolete Product(s)
STA016T
18/45
Description :
This register must contain a XDIV value that enables
the system PLL to generate a frequency of 50 MHZ
for the SYSCK. See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_MDIV_50
:
Address : 0xEA (234)
Type : RW - DEC
Software Reset : 13
Description :
This register must contain a MDIV value that enables
the system PLL to generate a frequency of 50 MHz
for the SYSCK. See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_PEL_42_5
Address : 0xE6 (230)
Type : RW - DEC
Software Reset : 126
Description :
This register must contain a PEL value that enables
the system PLL to generate a frequency of 42.5 MHz
for the SYSCK.See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_PEH_42_5 :
Address : 0xE7 (231)
Type : RW - DEC
Software Reset : 223
Description :
This register must contain a PEH value that enables
the system PLL to generate a frequency of 42.5 MHz
for the SYSCK.See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_NDIV_42_5 :
Address : 0xE8 (232)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a NDIV value that enables
the system PLL to generate a frequency of 42.5 MHz
for the SYSCK.See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_XDIV_42_5 :
Address : 0xE9 (233)
Type : RW - DEC
Software Reset : 1
Description :
This register must contain a XDIV value that enables
the system PLL to generate a frequency of 42.5 MHz
for the SYSCK.See table 4.
Default value at soft reset assume :
external crystal provide a CRYCK running at
14.31818 MHz
PLL_SYSTEM_MDIV_42_5
:
Address : 0xEA (234)
Type : RW - DEC
Software Reset : 10
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Obsolete Product(s) - Obsolete Product(s)

STA016T13TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC DECODER AUDIO 2.5 64TQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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