LTC3548-2
11
35482fb
APPLICATIONS INFORMATION
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V
OUT
immediately shifts by an
amount equal to ΔI
LOAD
• ESR, where ESR is the effective
series resistance of C
OUT
. ΔI
LOAD
also begins to charge
or discharge C
OUT
, generating a feedback error signal
used by the regulator to return V
OUT
to its steady-state
value. During this recovery time, V
OUT
can be monitored
for overshoot or ringing that would indicate a stability
problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feed forward capacitor, C
F
,
can be added to improve the high frequency response, as
shown in Figure 2. Capacitor C
F
provides phase lead by
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be
caused by switching loads with large (>1μF) load input
capacitors. The discharged load input capacitors are ef-
fectively put in parallel with C
OUT
, causing a rapid drop in
V
OUT
. No regulator can deliver enough current to prevent
this problem, if the switch connecting the load has low
resistance and is driven quickly. The solution is to limit
the turn-on speed of the load switch driver. A Hot Swap™
controller is designed specifi cally for this purpose and
usually incorporates current limiting, short-circuit protec-
tion, and soft-starting.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
% Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3548-2 circuits: 1) V
IN
quiescent current,
2) switching losses, 3) I
2
R losses, 4) other losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET
driver and control currents. V
IN
current results in a
small (<0.1%) loss that increases with V
IN
, even at
no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V
IN
to ground. The resulting dQ/dt is a current
out of V
IN
that is typically much larger than the DC bias
current. In continuous mode, I
GATECHG
= f
O
(Q
T
+ Q
B
),
where Q
T
and Q
B
are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to V
IN
and thus their effects
will be more pronounced at higher supply voltages.
3. I
2
R losses are calculated from the DC resistances of
the internal switches, R
SW
, and external inductor, R
L
.
In continuous mode, the average output current fl ows
through inductor L, but is chopped between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R
DS(ON)
and the duty cycle (D) as
follows:
R
SW
= (R
DS(ON)TOP
)(D) + (R
DS(ON)BOT
)(1 – D)
Hot Swap is a trademark of Linear Technology Corporation.
