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830154AMI-08LFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
1©2016 Integrated Device Technology, Inc Revision A March 30, 2016
1
2
3
4
8
7
6
5
OE
V
DD
GND
Q4
CLK_IN
Q2
Q3
Q1
General Description
The 830154I-08 is an LVCMOS, over-voltage tolerant clock fanout
buffer targeted for clock generation in high-performance
telecommunication, networking and computing applications. The
device is optimized for low-skew clock distribution in low-voltage
applications. The input over-voltage tolerance enables using this
device in mixed-mode voltage applications. An output enable pin
controls whether the outputs are in the active or high impedance
state. Guaranteed output skew characteristics make the 830154I-08
ideal for those applications demanding well defined performance and
repeatability. The 830154I-08 is packaged in a small 8-TSSOP and
in an 8-SOIC package.
Block Diagram
Features
• Low-skew 1:4 fanout buffer
• Supports 3.3V, 2.5V, 1.8V and 1.5V power supplies
• LVCMOS input and output levels
• 3.6V Over-voltage tolerance at the clock and control inputs
• Supports clock frequencies up to 160MHz
• LVCMOS compatible control input for output disable
• Output disabled to a high-impedance state
• -40°C to 85°C ambient operating temperature
• Available in lead-free RoHS 6 packages (8-TSSOP, 8-SOIC)
CLK_IN
OE
Q1
Q2
Q3
Q4
Pulldown
Pullup
830154AGI-08
8-TSSOP
4.4mm x 3.0mm x 0.925mm package body
G-Package
Top View
830154AMI-08
8-SOIC, 150 mil
3.9mm x 4.9mm x 1.375mm package body
M-Package
Top View
Pin Assignments
830154I-08
Data Sheet
Over-Voltage Tolerant 1.5V, 1:4
Fanout Buffer
2©2016 Integrated Device Technology, Inc Revision A March 30, 2016
830154I-08 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Table
Table 3. OE Configuration Table
NOTE: OE is an asynchronous control.
Number Name Type Description
1 CLK_IN Input Pulldown Single-ended clock input. LVCMOS interface levels.
2 Q1 Output Single-ended clock output. LVCMOS interface levels.
3 Q2 Output Single-ended clock output. LVCMOS interface levels.
4 Q3 Output Single-ended clock output. LVCMOS interface levels.
5 Q4 Output Single-ended clock output. LVCMOS interface levels.
6 GND Power Power supply ground.
7V
DD
Power Power supply pin.
8 OE Input Pullup Output enable pin. See Table 3. LVCMOS interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
C
PD
Power Dissipation Capacitance
V
DD
= 3.465V 14 pF
V
DD
= 2.375V 13 pF
V
DD
= 1.95V 13 pF
V
DD
= 1.6V 12 pF
R
PULLUP
Input Pullup Resistor 51 k
R
PULLDOWN
Input Pulldown Resistor 51 k
R
OUT
Output Impedance
V
DD
= 3.3V ± 5% 9
V
DD
= 2.5V ± 5% 10
V
DD
= 1.8V ± 0.15V 12
V
DD
= 1.5 ± 0.1V 15
Input
OperationOE
0 Q[4:1] disabled (high-impedance)
1 (default) Q[4:1] enabled
3©2016 Integrated Device Technology, Inc Revision A March 30, 2016
830154I-08 Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 4B. Power Supply DC Characteristics, V
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Table 4C. Power Supply DC Characteristics, V
DD
= 1.8V ± 0.15V, T
A
= -40°C to 85°C
Table 4D. Power Supply DC Characteristics, V
DD
= 1.5V ± 0.1V, T
A
= -40°C to 85°C
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
3.6V
Outputs, V
O
-0.5V to V
DD
+ 0.5V
Package Thermal Impedance,
JA
8 Lead TSSOP
8 Lead SOIC
121.5°C/W (0 mps)
103°C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
I
DDQ
Quiescent Power Supply Current Inputs Open, Outputs Unloaded 1 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 2.375 2.5 2.625 V
I
DDQ
Quiescent Power Supply Current Inputs Open, Outputs Unloaded 1 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 1.65 1.8 1.95 V
I
DDQ
Quiescent Power Supply Current Inputs Open, Outputs Unloaded 1 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 1.4 1.5 1.6 V
I
DDQ
Quiescent Power Supply Current Inputs Open, Outputs Unloaded 1 mA
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

830154AMI-08LFT

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Buy 830154AMI-08LFT
Manufacturer:
IDT
Description:
Clock Buffer ICS
Lifecycle:
New from this manufacturer.
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