NCV7380
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4
ELECTRICAL CHARACTERISTICS (V
S
= 7.0 to 18 V, V
CC
= 4.5 to 5.5 V and T
A
= 40 to 125°C unless otherwise noted.)
Characteristic Symbol Condition Min Typ Max Unit
GENERAL
V
CC
Undervoltage Lockout V
CC_UV
V
S
> 6.0 V, TxD = L, EN = H 2.75 4.3 V
Supply Current, Dominant I
Sd
V
S
= 18 V, V
CC
= 5.5 V,
TxD = L
1.0 3.0 mA
Supply Current, Dominant I
CCd
V
S
= 18 V, V
CC
= 5.5 V,
TxD = L
0.8 1.5 mA
Supply Current, Recessive I
Sr
V
S
= 18 V, V
CC
= 5.5 V,
TxD = Open
10 20 A
Supply Current, Recessive I
CCr
V
S
= 18 V, V
CC
= 5.5 V,
TxD = Open
14 30 A
Supply Current, Recessive I
Sr
+
I
CCr
V
S
= 12 V, V
CC
= 5.0 V,
TxD = Open, T
A
= 25°
24 A
Thermal Shutdown T
sd
(Note 5) 155 180 °C
Thermal Recovery T
hys
(Note 5) 126 140 150 °C
BUS Transmit
Short Circuit Bus Current I
BUS_LIM
(Notes 6 and 7)
V
BUS
= V
S
, Driver On 120 200 mA
Pullup Current Bus I
BUS_PU
(Notes 6 and 7)
V
BUS
= 0, V
S
= 12 V, Driver Off 600 200 A
Bus Reverse Current, Recessive I
BUS_PAS_rec
(Notes 6 and 7)
V
BUS
> V
S
, 8.0 V < V
BUS
< 18 V,
7.0 V < V
S
< 18 V , Driver Off
5.0 A
Bus Reverse Current Loss of
Battery
I
BUS
(Notes 6 and 7)
V
S
= 0 V, 0 V < V
BUS
< 18 V 5.0 A
Bus Current During Loss of
Ground
I
BUS_NO_GND
(Notes 6 and 7)
V
S
= 12 V, 0 < V
BUS
< 18 V 1.0 1.0 mA
Transmitter Dominant Voltage V
BUSdom_DRV_2
(Note 6)
V
S
= 7.0 V, Load = 500 1.2 V
Transmitter Dominant Voltage V
BUSdom_DRV_3
(Note 6)
V
S
= 18 V, Load = 500 2.0 V
Bus Input Capacitance C
BUS
(Note 5) Pulse Response via 10 k
V
PULSE
= 12 V, V
S
= Open
25 35 pF
BUS Receive
Receiver Dominant Voltage V
BUSdom
(Notes 6 and 7)
0.4*V
S
V
Receiver Recessive Voltage V
BUSrec
(Notes 6 and 7)
0.6*V
S
V
Center Point of Receiver
Threshold
V
BUS_CNT
(Notes 6 and 7)
V
BUS_CNT
= (V
BUSdom
and V
BUSrec
)/2 0.487
*V
S
0.5*V
S
0.512*V
S
V
Receiver Hysteresis V
HYS
(Notes 6 and 7)
V
BUS_CNTt
= (V
BUSrec
V
BUSdom
) 0.16*V
S
V
5. No production test, guaranteed by design and qualification.
6. In accordance to LIN physical layer specification 1.3.
7. In accordance to LIN physical layer specification 2.0.
NCV7380
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5
ELECTRICAL CHARACTERISTICS (continued) (V
S
= 7.0 to 18 V, V
CC
= 4.5 to 5.5 V and T
A
= 40 to 125°C unless otherwise noted.)
Characteristic Symbol Condition Min Typ Max Unit
TXD
High Level Input Voltage
V
ih
Rising Edge 0.7*V
CC
V
Low Level Input Voltage V
il
Falling Edge 0.3*V
CC
V
TxD Pullup Resistor R
IH_TXD
V
TxD
= 0 V 10 15 25 k
RXD
Low Level Output Voltage V
ol_rxd
I
RxD
= 2.0 mA 0.9 V
Leakage Current V
leak_rxd
V
RxD
= 5.5 V, Recessive 10 10 A
AC CHARACTERISTICS
Propagation Delay Transmitter
(Notes 10 and 12)
t
trans_pdf
t
trans_pdr
Bus Loads: 1.0 K/1.0 nF,
660 /6.8 nF, 500 /10 nF
5.0 s
Propagation Delay Transmitter
Symmetry (Notes 8 and 12)
t
trans_sym
Calculate t
trans_pdf
t
trans_pdr
2.0 2.0 s
Propagation Delay Receiver
(Notes 8, 9, 10, 12 and 15)
t
rec_pdf
t
rec_pdr
C
RxD
= 20 pF 6.0 s
Propagation Delay Receiver
Symmetry (Notes 8 and 9)
t
rec_sym
Calculate t
trans_pdf
t
trans_pdr
2.0 2.0 s
Slew Rate Rising and Falling
Edge, High Battery
(Notes 8 and 13)
t
SR_HB
Bus Loads: V
S
= 18 V, 1.0 K/1.0 nF,
660 /6.8 nF, 500 /10 nF
1.0 2.0 3.0 V/s
Slew Rate Rising and Falling
Edge, Low Battery
(Notes 8 and 13)
t
SR_LB
Bus Loads: V
S
= 7.0 V, 1.0 K/1.0 nF,
660 /6.8 nF, 500 /10 nF
0.5 2.0 3.0 V/s
Slope Symmetry, High Battery
(Notes 8 and 13)
t
ssym_HB
Bus Loads: V
S
= 18 V, 1.0 K/1.0 nF,
660 /6.8 nF, 500 /10 nF, Calculate
t
sdom
t
srec
5.0 5.0 s
Bus Duty Cycle
(Notes 9 and 16)
D1
D2
Calculate t
BUS_rec(min)
/100 s
Calculate t
BUS_rec(max)
/100 s
0.396
0.581
s/s
s/s
Receiver Debounce Time
(Notes 11, 14 and 15)
t
rec_deb
BUS Rising and Falling Edge 1.5 4.0 s
8. In accordance to LIN physical layer specification 1.3.
9. In accordance to LIN physical layer specification 2.0.
10. Propagation delays are not relevant for LIN protocol transmission, only symmetry.
11. No production test, guaranteed by design and qualification.
12. See Figure 2 Input/Output Timing.
13. See Figure 7 Slope Time Calculation.
14. See Figure 3 Receiver Debouncing.
15. This parameter is tested by applying a square wave to the bus. The minimum slew rate for the bus rising and falling edges is 50 V/s.
16. See Figure 8 Duty Cycle Measurement and Calculation.
NCV7380
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6
TIMING DIAGRAMS
Figure 2. Input/Output Timing
50%
50%
50%
50%
100%
95%
0%
5%
t
trans_pdf
t
trans_pdr
t
rec_pdr
t
rec_pdf
V
BUS
TxD
RxD
BUS
Figure 3. Receiver Debouncing Filter
60%
50%
t < t
rec_deb
V
BUS
V
RxD
40%
t < t
rec_deb
t
t

NCV7380DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC TRANSCEIVER LINEAR 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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