AD7910/AD7920
Rev. C | Page 13 of 24
CIRCUIT INFORMATION
The AD7910/AD7920 are fast, micropower, 10-bit/12-bit,
single-supply A/D converters, respectively. The parts can be
operated from a 2.35 V to 5.25 V supply. When operated from
either a 5 V supply or a 3 V supply, the AD7910/AD7920 are
capable of throughput rates of 250 kSPS when provided with a
5 MHz clock.
The AD7910/AD7920 provide the user with an on-chip track-
and-hold, A/D converter, and a serial interface housed in a tiny
6-lead SC70 package or 8-lead MSOP package, which offers the
user considerable space saving advantages over alternative
solutions.
The serial clock input accesses data from the part but also
provides the clock source for the successive approximation A/D
converter. The analog input range is 0 V to V
DD
. An external
reference is not required for the ADC and there is no reference
on-chip. The reference for the AD7910/AD7920 is derived from
the power supply and thus gives the widest dynamic input
range.
The AD7910/AD7920 also feature a power-down option to
allow power saving between conversions. The power-down
feature is implemented across the standard serial interface, as
described in the
Modes of Operation section.
AD7910/AD7920
Rev. C | Page 14 of 24
CONVERTER OPERATION
The AD7910/AD7920 are successive approximation analog-to-
digital converters based around a charge redistribution DAC.
Figure 14 and Figure 15 show simplified schematics of the
ADC.
Figure 14 shows the ADC during its acquisition phase.
When SW2 is closed and SW1 is in Position A, the comparator
is held in a balanced condition, and the sampling capacitor
acquires the signal on V
IN
.
CHARGE
REDISTRIBUTION
DAC
CONTROL
LOGIC
COMPARATOR
SW2
SAMPLING
CAPACITOR
ACQUISITION
PHASE
SW1
A
B
AGND
V
DD
/2
V
IN
02976-014
Figure 14. ADC Acquisition Phase
When the ADC starts a conversion (see Figure 15), SW2 opens
and SW1 moves to Position B, causing the comparator to become
unbalanced. The control logic and charge redistribution DAC are
used to add and subtract fixed amounts of charge from the
sampling capacitor to bring the comparator back into a balanced
condition. When the comparator is rebalanced, the conversion is
complete. The control logic generates the ADC output code.
Figure 16 shows the ADC transfer function.
CHARGE
REDISTRIBUTION
DAC
CONTROL
LOGIC
COMPARATOR
SW2
SAMPLING
CAPACITOR
CONVERSION
PHASE
SW1
A
B
AGND
V
DD
/2
V
IN
02976-015
Figure 15. ADC Conversion Phase
ADC TRANSFER FUNCTION
The output coding of the AD7910/AD7920 is straight binary.
The designed code transitions occur at the successive integer
LSB values, that is, 1 LSB, 2 LSBs, and so on. The LSB size is
V
DD
/4096 for the AD7920 and V
DD
/1024 for the AD7910. The
ideal transfer characteristic for the AD7910/AD7920 is shown
in
Figure 16.
000...000
0V
ADC CODE
ANALOG INPUT
111...111
000...001
000...010
111...110
111...000
011...111
1LSB
+V
DD
– 1LSB
1LSB = V
DD
/1024 (AD7910)
1LSB = V
DD
/4096 (AD7920)
02976-016
Figure 16. Transfer Characteristic
TYPICAL CONNECTION DIAGRAM
Figure 17 shows a typical connection diagram for the AD7910/
AD7920. V
REF
is taken internally from V
DD
and, as such, V
DD
should be well decoupled. This provides an analog input range of
0 V to V
DD
. The conversion result is output in a 16-bit word with
four leading zeros followed by the MSB of the 12-bit or 10-bit
result. Two trailing zeros follow the 10-bit result from the
AD7910.
Alternatively, because the supply current required by the
AD7910/AD7920 is so low, a precision reference can be used as
the supply source to the AD7910/AD7920. An REF19x voltage
reference (REF195 for 5 V or REF193 for 3 V) can be used to
supply the required voltage to the ADC (see
Figure 17). This
configuration is especially useful if the power supply is quite
noisy or if the system supply voltages are at a value other than
5 V or 3 V (for example, 15 V). The REF19x outputs a steady
voltage to the AD7910/AD7920. If the low dropout REF193 is
used, the current it needs to supply to the AD7910/AD7920 is
typically 1.2 mA. When the ADC is converting at a rate of
250 kSPS, the REF193 needs to supply a maximum of 1.4 mA to
the AD7910/AD7920. The load regulation of the REF193 is
typically 10 ppm/mA (REF193, V
S
= 5 V), which results in an
error of 14 ppm (42 μV) for the 1.4 mA drawn from it. This
corresponds to a 0.057 LSB error for the AD7920 with V
DD
=
3 V from the REF193 and a 0.014 LSB error for the AD7910.
For applications where power consumption is of concern, the
power-down mode of the ADC and the sleep mode of the
REF19x reference should be used to improve power
performance. See the
Modes of Operation section.
AD7910/AD7920
Rev. C | Page 15 of 24
AD7910/
AD7920
V
DD
V
IN
SERIAL
INTERFACE
0V TO V
DD
INPUT
μ
C/
μ
P
GND
SCLK
SDATA
CS
0.1
μ
F10
μ
F
1
μ
F
TANT
0.1
μ
F
680nF
3V
5V
SUPPLY
1.2mA
REF193
02976-017
Figure 17. REF193 as Power Supply
Table 6 provides typical performance data with various
references used as a V
DD
source for a 100 kHz input tone at
room temperature, under the same setup conditions.
Table 6. AD7920 Typical Performance for Various Voltage
References IC
Reference Tied to V
DD
AD7920 SNR Performance (dB)
AD780 @ 3 V 72.65
REF193 72.35
AD780 @ 2.5 V 72.5
REF192 72.2
REF43 72.6
ANALOG INPUT
Figure 18 shows an equivalent circuit of the analog input
structure of the AD7910/AD7920. The two diodes, D1 and D2,
provide ESD protection for the analog input. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 300 mV. This causes these diodes to
become forward biased and start conducting current into the
substrate. The maximum current these diodes can conduct
without causing irreversible damage to the parties is 10 mA.
Capacitor C1 in
Figure 18 is typically about 6 pF and can be
attributed primarily to pin capacitance. Resistor R1 is a lumped
component made up of the on resistance of a switch. This
resistor is typically about 100 Ω. Capacitor C2 is the ADC
sampling capacitor and has a capacitance of 20 pF typically. For
ac applications, removing high frequency components from the
analog input signal is recommended by use of a band-pass filter
on the relevant analog input pin. In applications where
harmonic distortion and signal-to-noise ratio are critical, the
analog input should be driven from a low impedance source.
Large source impedances significantly affect the ac performance
of the ADC. This can necessitate the use of an input buffer
amplifier. The choice of the op amp is a function of the
particular application.
C1
6pF
C2
20pF
R1
D1
D2
CONVERSION PHASE—SWITCH OPEN
TRACK PHASE—SWITCH CLOSED
V
DD
V
IN
02976-018
Figure 18. Equivalent Analog Input Circuit
Table 7 provides some typical performance data with various op
amps used as the input buffer for a 100 kHz input tone at room
temperature, under the same setup conditions.
Table 7. AD7920 Typical Performance for Various Input
Buffers, V
DD
= 3 V
Op Amp in the Input Buffer AD7920 SNR Performance (dB)
AD711 72.3
AD797 72.5
AD845 71.4
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
Figure 12).
DIGITAL INPUTS
The digital inputs applied to the AD7910/AD7920 are not limited
by the maximum ratings that limit the analog input. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
V
DD
+ 0.3 V limit as on the analog input. For example, if the
AD7910/AD7920 were operated with a V
DD
of 3 V, then 5 V logic
levels could be used on the digital inputs. However, it is important
to note that the data output on SDATA still have 3 V logic levels
when V
DD
= 3 V. Another advantage of SCLK and
CS
not being
restricted by the V
DD
+ 0.3 V limit is that power supply
sequencing issues are avoided. If
CS
or SCLK is applied before
V
DD
, there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V were applied prior to V
DD
.

AD7910ARMZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 250 kSPS 10-Bit IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union