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MC14516BDR2G

P1-P3P4-P6P7-P9P10-P10
MC14516B
http://onsemi.com
7
Figure 3. Presettable Cascaded 8−Bit Up/Down Counter
NOTE: The Least Significant Digit (L.S.D.) counts from a preset value once Preset Enable (PE) goes low. The Most Significant
Digit (M.S.D.) is disabled while C
in
is high. When the count of the L.S.D. reaches 0 (count down mode) or reaches 15 (count
up mode), C
out
goes low for one complete clock cycle, thus allowing the next counter to decrement/increment one count.
(See Timing Diagram) The L.S.D. now counts through another cycle (15 clock pulses) and the above cycle is repeated.
L.S.D.
MC14516B
C
out
Q0 Q1 Q2 Q3
P0 P1 P2 P3
PE
R
U/D
CLOCK
C
in
M.S.D.
MC14516B
C
out
Q0 Q1 Q2 Q3
P0 P1 P2 P3
PE
R
U/D
CLOCK
C
in
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
TERMINAL COUNT
INDICATOR
P0 P1 P2 P3 P4 P5 P6 P7
THUMBWHEEL SWITCHES
(OPEN FOR “0")
+V
DD
+V
DD
+V
DD
OPEN = COUNT
CLOCK
RESET
RESISTORS = 10 kW
0 = COUNT
1 = PRESET
1 = UP
0 = DOWN
PRESET
ENABLE
MC14516B
http://onsemi.com
8
TIMING DIAGRAM FOR THE PRESETTABLE CASCADED 8−BIT UP/DOWN COUNTER
CLOCK
UP/DOWN
CARRY IN
(MSD)
PE
P7
P6
P5
P4
P3
P2
P1
P0
CARRY OUT
(MSD)
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
CARRY OUT
(LSD)
RESET
COUNT
PRESET ENABLE
UP COUNT DOWN COUNT UP COUNT
DOWN
COUNT
PRESET
ENABLE
RESET
13 14 15 16 17 18 18 17 16 15 14 13
19 251 252 253 254 255 0 1 2 2 13 012
UP COUNT
MC14516B
http://onsemi.com
9
Figure 4. Programmable Cascaded Frequency Divider
NOTE: The programmable frequency divider can be set by applying the desired divide ratio, in binary, to the preset inputs. For example,
the maximum divide ratio of 255 may be obtained by applying a 1111 1111 to the preset inputs P0 to P7. For this divide operation,
both counters should be configured in the count down mode. The divide ratio of zero is an undefined state and should be avoided.
BUFFER
f
out
M.S.D.
MC14516B
L.S.D.
MC14516B
THUMBWHEEL SWITCHES
(OPEN FOR “0")
+V
DD
+V
DD
C
out
+V
DD
OPEN = COUNT
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q0 Q1 Q2 Q3
P0 P1 P2 P3
P0 P1 P2 P3
PE
R
U/D
CLOCK
C
in
C
out
Q0 Q1 Q2 Q3
P0 P1 P2 P3
PE
R
U/D
CLOCK
C
in
P4 P5 P6 P7
CLOCK (f
in
)
RESET
RESISTORS = 10 kW
f
out
=
f
in
n
P1-P3P4-P6P7-P9P10-P10

MC14516BDR2G

Mfr. #:
Buy MC14516BDR2G
Manufacturer:
ON Semiconductor
Description:
Counter Shift Registers 3-18V Binary Up/Down
Lifecycle:
New from this manufacturer.
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