Rev. 1.2 13
Si8410/20/21 (5 kV)
Si8422/23 (2.5 & 5 kV)
Si8423Ax, Bx
V
DD1
V
DD2
V
DD1
V
DD2
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
5.4
1.7
1.3
1.7
8.1
2.6
2.0
2.6
mA
1 Mbps Supply Current (All inputs = 500 kHz square wave, C
L
= 15 pF on all outputs)
Si8410Ax, Bx
V
DD1
V
DD2
2.0
1.1
3.0
1.7
mA
Si8420Ax, Bx
V
DD1
V
DD2
3.5
1.9
5.3
2.9
mA
Si8421Ax, Bx
V
DD1
V
DD2
2.8
2.8
4.2
4.2
mA
Si8422Ax, Bx
V
DD1
V
DD2
2.8
2.8
4.2
4.2
mA
Si8423Ax, Bx
V
DD1
V
DD2
3.3
1.8
5.0
2.8
mA
10 Mbps Supply Current (All inputs = 5 MHz square wave, C
L
= 15 pF on all outputs)
Si8410Bx
V
DD1
V
DD2
2.0
1.1
3.0
1.7
mA
Si8420Bx
V
DD1
V
DD2
3.5
2.1
5.3
3.0
mA
Si8421Bx
V
DD1
V
DD2
2.9
2.9
4.3
4.3
mA
Table 3. Electrical Characteristics
1
(Continued)
(V
DD1
= 2.70 V, V
DD2
= 2.70 V, T
A
= –40 to 125 °C)
Parameter
Symbol Test Condition Min Typ Max Unit
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T
A
= 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.
Si8410/20/21 (5 kV)
Si8422/23 (2.5 & 5 kV)
14 Rev. 1.2
Si8422Bx
V
DD1
V
DD2
2.9
2.9
4.3
4.3
mA
Si8423Bx
V
DD1
V
DD2
3.4
2.0
5.1
2.9
mA
100 Mbps Supply Current (All inputs = 50 MHz square wave, CL = 15 pF on all outputs)
Si8410Bx
V
DD1
V
DD2
2.0
2.0
3.0
3.0
mA
Si8420Bx
V
DD1
V
DD2
3.5
5.5
5.3
6.9
mA
Si8421Bx
V
DD1
V
DD2
4.6
4.6
5.8
5.8
mA
Si8422Bx
V
DD1
V
DD2
4.6
4.6
5.8
5.8
mA
Si8423Bx
V
DD1
V
DD2
3.4
5.2
5.1
6.5
mA
Timing Characteristics
Si841xAx, Si842xAx
Maximum Data Rate 0 1.0 Mbps
Minimum Pulse Width 250 ns
Propagation Delay t
PHL
, t
PLH
See Figure 1 35 ns
Pulse Width Distortion
|t
PLH
-
t
PHL
|
PWD See Figure 1 25 ns
Propagation Delay Skew
3
t
PSK(P-P)
——40ns
Channel-Channel Skew t
PSK
——35ns
Si841xBx, Si842xBx
Maximum Data Rate 0 150 Mbps
Table 3. Electrical Characteristics
1
(Continued)
(V
DD1
= 2.70 V, V
DD2
= 2.70 V, T
A
= –40 to 125 °C)
Parameter
Symbol Test Condition Min Typ Max Unit
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T
A
= 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.2 15
Si8410/20/21 (5 kV)
Si8422/23 (2.5 & 5 kV)
Minimum Pulse Width 6.0 ns
Propagation Delay t
PHL
, t
PLH
See Figure 1 4.0 8.0 11 ns
Pulse Width Distortion
|t
PLH
-
t
PHL
|
PWD See Figure 1 1.5 3.0 ns
Propagation Delay Skew
3
t
PSK(P-P)
—2.03.0ns
Channel-Channel Skew t
PSK
—0.51.5ns
All Models
Output Rise Time t
r
C
L
= 15 pF 2.0 4.0 ns
Output Fall Time t
f
C
L
= 15 pF 2.0 4.0 ns
Peak Eye Diagram Jitter t
JIT(PK)
See Figure 6 350 ps
Common Mode Transient
Immunity
CMTI V
I
=V
DD
or 0 V 20 45 kV/µs
Start-up Time
4
t
SU
—1540µs
Table 4. Absolute Maximum Ratings
1
Parameter Symbol Min Typ Max Unit
Storage Temperature
2
T
STG
–65 150
Operating Temperature T
A
–40 125
Supply Voltage V
DD1
, V
DD2
–0.5 6.0 V
Input Voltage V
I
–0.5 V
DD
+ 0.5 V
Output Voltage V
O
–0.5 V
DD
+ 0.5 V
Output Current Drive Channel I
O
——10mA
Lead Solder Temperature (10 s) 260
Maximum Isolation Voltage (1 s) NB SOIC-8 4500 V
RMS
Maximum Isolation Voltage (1 s) WB SOIC-16 6500 V
RMS
Notes:
1. Permanent device damage may occur if the above absolute maximum ratings are exceeded. Functional operation
should be restricted to conditions as specified in the operational sections of this data sheet.
2. VDE certifies storage temperature from –40 to 150 °C.
Table 3. Electrical Characteristics
1
(Continued)
(V
DD1
= 2.70 V, V
DD2
= 2.70 V, T
A
= –40 to 125 °C)
Parameter
Symbol Test Condition Min Typ Max Unit
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T
A
= 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.

SI8421BD-D-ISR

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Digital Isolators 5 kV 1 forward & 1 reverse 2-channel isolator
Lifecycle:
New from this manufacturer.
Delivery:
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