SI8421BD-D-ISR Datasheet SI8422AB-D-ISR, SI8422AB-D-IS, SI8422BB-D-IS | P4-P6

Si8410/20/21 (5 kV)

Si8422/23 (2.5 & 5 kV)

4 Rev. 1.2

1. Electrical Specifications

Table 1. Electrical Characteristics

(V

DD1

= 5 V ±10%, V

DD2

= 5 V ±10%, T

A

=–40 to 125ºC)

Parameter

Symbol Test Condition Min Typ Max Unit

VDD Undervoltage Threshold VDDUV+ V

DD1

, V

DD2

rising 2.15 2.3 2.5 V

VDD Negative-Going Lockout

Hysteresis

VDD

HYS

45 75 95 mV

Positive-Going Input Threshold VT+ All inputs rising 1.6 — 1.9 V

Negative-Going Input Threshold VT– All inputs falling 1.1 — 1.4 V

Input Hysteresis V

HYS

0.40 0.45 0.50 V

High Level Input Voltage V

IH

2.0 — — V

Low Level Input Voltage V

IL

——0.8V

High Level Output Voltage V

OH

loh = –4 mA V

DD1

,V

DD2

–0.4 4.8 — V

Low Level Output Voltage V

OL

lol = 4 mA — 0.2 0.4 V

Input Leakage Current I

L

——±10µA

Output Impedance

1

Z

O

—50—

DC Supply Current (All inputs 0 V or at Supply)

Si8410Ax, Bx

V

DD1

V

DD2

V

DD1

V

DD2

All inputs 0 DC

All inputs 1 DC

—

1.0

3.0

1.0

1.5

4.5

1.5

mA

Si8420Ax, Bx

V

DD1

V

DD2

V

DD1

V

DD2

All inputs 0 DC

All inputs 1 DC

—

1.3

1.7

5.8

1.7

2.0

2.6

8.7

2.6

mA

Si8421Ax, Bx

V

DD1

V

DD2

V

DD1

V

DD2

All inputs 0 DC

All inputs 1 DC

—

1.7

3.7

2.6

5.6

mA

Si8422Ax, Bx

V

DD1

V

DD2

V

DD1

V

DD2

All inputs 0 DC

All inputs 1 DC

—

3.7

1.7

5.6

2.6

mA

Si8423Ax, Bx

V

DD1

V

DD2

V

DD1

V

DD2

All inputs 0 DC

All inputs 1 DC

—

5.4

1.7

1.3

1.7

8.1

2.6

2.0

2.6

mA

Notes:

1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of

the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads

where transmission line effects will be a factor, output pins should be appropriately terminated with controlled

impedance PCB traces.

2. t

PSK(P-P)

is the magnitude of the difference in propagation delay times measured between different units operating at

the same supply voltages, load, and ambient temperature.

3. Start-up time is the time period from the application of power to valid data at the output.

Rev. 1.2 5

Si8410/20/21 (5 kV)

Si8422/23 (2.5 & 5 kV)

1 Mbps Supply Current (All inputs = 500 kHz square wave, C

L

= 15 pF on all outputs)

Si8410Ax, Bx

V

DD1

V

DD2

—

2.0

1.1

3.0

1.7

mA

Si8420Ax, Bx

V

DD1

V

DD2

—

3.5

1.9

5.3

2.9

mA

Si8421Ax, Bx

V

DD1

V

DD2

—

2.8

4.2

mA

Si8422Ax, Bx

V

DD1

V

DD2

—

2.8

4.2

mA

Si8423Ax, Bx

V

DD1

V

DD2

—

3.4

1.9

5.1

2.9

mA

10 Mbps Supply Current (All inputs = 5 MHz square wave, C

L

= 15 pF on all outputs)

Si8410Bx

V

DD1

V

DD2

—

2.1

1.5

3.1

2.1

mA

Si8420Bx

V

DD1

V

DD2

—

3.6

2.6

5.4

3.6

mA

Si8421Bx

V

DD1

V

DD2

—

3.2

4.5

mA

Si8422Bx

V

DD1

V

DD2

—

3.2

4.5

mA

Si8423Bx

V

DD1

V

DD2

—

3.4

2.5

5.1

3.5

mA

Table 1. Electrical Characteristics (Continued)

(V

DD1

= 5 V ±10%, V

DD2

= 5 V ±10%, T

A

=–40 to 125ºC)

Parameter

Symbol Test Condition Min Typ Max Unit

Notes:

1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of

the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads

where transmission line effects will be a factor, output pins should be appropriately terminated with controlled

impedance PCB traces.

2. t

PSK(P-P)

is the magnitude of the difference in propagation delay times measured between different units operating at

the same supply voltages, load, and ambient temperature.

3. Start-up time is the time period from the application of power to valid data at the output.

Si8410/20/21 (5 kV)

Si8422/23 (2.5 & 5 kV)

6 Rev. 1.2

100 Mbps Supply Current (All inputs = 50 MHz square wave, C

L

= 15 pF on all outputs)

Si8410Bx

V

DD1

V

DD2

—

2.1

5.0

3.1

6.3

mA

Si8420Bx

V

DD1

V

DD2

—

3.7

9.8

5.4

12.3

mA

Si8421Bx

V

DD1

V

DD2

—

6.8

8.5

mA

Si8422Bx

V

DD1

V

DD2

—

6.8

8.5

mA

Si8423Bx

V

DD1

V

DD2

—

3.4

9.2

5.1

11.5

mA

Timing Characteristics

Si841xAx, Si842xAx

Maximum Data Rate 0 — 1.0 Mbps

Minimum Pulse Width — — 250 ns

Propagation Delay t

PHL

, t

PLH

See Figure 1 — — 35 ns

Pulse Width Distortion

|t

PLH

-

t

PHL

|

PWD See Figure 1 — — 25 ns

Propagation Delay Skew

2

t

PSK(P-P)

— — 40 ns

Channel-Channel Skew t

PSK

— — 35 ns

Si841xBx, Si842xBx

Maximum Data Rate 0 — 150 Mbps

Minimum Pulse Width — — 6.0 ns

Propagation Delay t

PHL

, t

PLH

See Figure 1 4.0 8.0 11 ns

Pulse Width Distortion

|t

PLH

-

t

PHL

|

PWD See Figure 1 — 1.5 3.0 ns

Propagation Delay Skew

2

t

PSK(P-P)

—2.03.0ns

Channel-Channel Skew t

PSK

—0.51.5ns

All Models

Output Rise Time t

r

C

L

= 15 pF — 2.0 4.0 ns

Output Fall Time t

f

C

L

= 15 pF — 2.0 4.0 ns

Peak Eye Diagram Jitter t

JIT(PK)

See Figure 6 — 350 — ps

Common Mode Transient

Immunity

CMTI V

I

=V

DD

or 0 V 20 45 — kV/µs

Start-up Time

3

t

SU

—1540µs

Table 1. Electrical Characteristics (Continued)

(V

DD1

= 5 V ±10%, V

DD2

= 5 V ±10%, T

A

=–40 to 125ºC)

Parameter

Symbol Test Condition Min Typ Max Unit

Notes:

1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of

the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads

where transmission line effects will be a factor, output pins should be appropriately terminated with controlled

impedance PCB traces.

2. t

PSK(P-P)

is the magnitude of the difference in propagation delay times measured between different units operating at

the same supply voltages, load, and ambient temperature.

3. Start-up time is the time period from the application of power to valid data at the output.

SI8421BD-D-ISR

SI8421BD-D-ISR

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