Atmel AT88SA102S [DATASHEET] 9
8584H−CRYPTO−9/2012
5. DC Parameters
Table 5-1. DC Parameters
Parameter Symbol Min Typ Max Unit Notes
Operating temperature T A -40 85 °C
Power supply voltage Vcc 2.7 5.25 V
Fuse burning voltage VBURN 3.0 5.25 V Voltage applied to Vcc pin. See Sections 6.3 and 6.5.
Active power supply current ICC - 6 mA
Sleep power supply current @
-40C to 55C
I
SLEEP
150 nA When chip is in sleep mode, Vcc = 5.25 V,
Vsig = 0.0 to 0.3 V or
Vsig = Vcc-0.3 V to Vcc
Sleep power supply current @
85C
I
SLEEP
1
µA
When chip is in sleep mode, Vcc = 5.25 V
Vsig = 0.0 to 0.3 V or
Vsig = Vcc-0.3 V to Vcc
Input low voltage @
Vcc = 5.25 V
VIL -0.5 0.75 V Voltage levels for Wake token when chip is in sleep
mode.
Input low voltage @
Vcc = 2.7 V
VIL -0.5 0.5 V Voltage levels for Wake token when chip is in sleep
mode.
Input high voltage @
Vcc = 5.25 V
VIH 1.5 5.25 V Voltage levels for Wake token when chip is in sleep
mode.
Input high voltage @
Vcc = 2.7 V
VIH 1.25 3.0 V Voltage levels for Wake token when chip is in sleep
mode.
Input low voltage when active VIL -0.5 0.5 V When chip is in active mode,
Vcc = 2.7 – 5.25 V
Input high voltage when active VIH 1.2 5.25 V When chip is in active mode,
Vcc = 2.7 – 5.25 V
Output low voltage VOL 0.4 V When chip is in active mode,
Vcc = 2.7 – 5.25 V
Maximum input voltage VMAX 5.25 V
5.1 IO Flags
The system is always the bus master, so before any IO transaction, the system must send an 8-bit flag to the chip to indicate
the IO operation that is to be performed, as follows:
Value Name Meaning
0x77 Command After this flag, the system starts sending a command block to the chip. The first bit of the block
can follow immediately after the last bit of the flag.
0x88 Transmit After a turn-around delay, the chip will start transmitting the response block for a previously
transmitted command block.
0xCC Sleep Upon receipt of a sleep flag, the chip will enter a low power mode until the next Wake token is
received.
All other values are reserved and will be ignored.
As the single signal wire may be shared with a CryptoAuthentication host chip, the AT88SA102S chip includes a PauseLong
command which causes it to ignore all activity on the signal pin until the expiration of the watchdog timer.
