Rev. 1.1 7/04 Copyright © 2004 by Silicon Laboratories Si5100
Si5100
SiPHY™ OC-48/STM-16 SONET/SDH TRANSCEIVER
Features
Complete, low-power, high-speed, SONET/SDH transceiver with
integrated limiting amp, CDR, CMU, and MUX/DEMUX
Applications
Description
The Si5100 is a complete low-power transceiver for high-speed serial
communication systems operating between OC-48 and 2.7 Gbps. The receive
path consists of a fully-integrated limiting amplifier, clock and data recovery unit
(CDR), and 1:16 deserializer. The transmit path combines a low-jitter clock
multiplier unit (CMU) with a 16:1 serializer. The CMU uses Silicon Laboratories’
DSPLL technology to provide superior jitter performance while reducing design
complexity by eliminating external loop filter components. To simplify BER
optimization in long-haul applications, programmable slicing and sample phase
adjustment are supported. The Si5100 operates from a single 1.8 V supply over
the industrial temperature range (–20 to 85 °C).
Functional Block Diagram
Data rates supported:
OC-48/STM-16 through 2.7 Gbps
FEC
Low-power operation 1.2 W (typ)
DSPLL™ based clock multiplier
unit w/ selectable loop filter
bandwidths
Integrated limiting amplifier
Loss-of-signal (LOS) alarm
Diagnostic and line loopbacks
SONET-compliant loop timed
operation
Programmable slicing level and
sample phase adjustment
LVDS/LVPECL compatible
interface
Single supply 1.8 V operation
15 x 15 mm BGA package
SONET/SDH transmission
systems
Optical transceiver modules
SONET/SDH test equipment
TXCLKOUT
RXDOUT[15:0]
RXCLK
TXDOUT
RXDIN
TXDIN[15:0]
SLICELVL
PHASEADJ
BWSEL[1:0]
TX CL K1 6 IN
REFCLK
1:16
DEMUX
16:1
MUX
Limiting
AM P
CDR
DSPLL
TM
TX CM U
÷
Line
Loopback
Diagnostic
Loopback
Ordering Information:
See page 35.
Si5100
Bottom View
Si5100
2 Rev. 1.1
Si5100
Rev. 1.1 3
TABLE OF CONTENTS
Section Page
1. Si5100 Detailed Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3. Si5100 Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5. Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.1. Receiver Differential Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.2. Limiting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.3. Clock and Data Recovery (CDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
5.4. Deserialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
5.5. Voltage Reference Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
5.6. Auxiliary Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
5.7. Receive Data Squelch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
6. Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
6.1. DSPLL™ Clock Multiplier Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
6.2. Serialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
7. Loop Timed Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
8. Diagnostic Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
9. Line Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
10. Bias Generation Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
11. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
12. Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
13. Transmit Differential Output Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
14. Internal Pullups and Pulldowns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
15. Power Supply Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
16. Si5100 Pinout: 195 BGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
17. Pin Descriptions: Si5100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
18. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
19. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
20. 15x15 mm 195L CBGA Recommended PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

SI5100-F-BC

Mfr. #:
Manufacturer:
Silicon Labs
Description:
IC TXRX SERIAL/DESERIAL 195CBGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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