REV. A
ADP3162
–7–
protecting the microprocessor from destruction. The crowbar
comparator releases when the output drops below the specified
reset threshold, and the controller returns to normal operation if
the cause of the overvoltage failure does not persist.
Output Disable
The ADP3162 includes an output disable function that turns off
the control loop to bring the output voltage to 0 V. Because an
extra pin is not available, the disable feature is accomplished by
pulling the COMP pin to ground. When the COMP pin drops
below 0.64 V, the oscillator stops and both PWM signals are
driven low. This function does not place the part in a low quiescent
current shutdown state, and the reference voltage is still available.
The COMP pin should be pulled down with an open collector
or open drain type of output capable of sinking at least 2 mA.
APPLICATION INFORMATION
A VRM 8.5-Compliant Design Example
The design parameters for a typical high-performance Intel
Tualatin CPU application designed to meet Intel’s VRM 8.5
specification are as follows:
Input voltage (V
IN
) = 5 V
VID setting voltage (V
OUT
) = 1.8 V
Nominal output voltage at no load (V
ONL
) = 1.845 V
Nominal output voltage at full load (V
OFL
) = 1.755 V
Static output voltage drop based on a 3.2 mΩ load line
(R
OUT
) from no load to full load (V
∆
) = (V
ONL
) – (V
OFL
) =
1.845 V – 1.755 V = 90 mV
Maximum output current (I
O
) = 28 A
C
T
Selection—Choosing the Clock Frequency
The ADP3162 uses a fixed-frequency control architecture that is
set by an external timing capacitor, C
T
. The value of C
T
for a given
clock frequency can be selected using the graph in TPC 1.
The clock frequency determines the switching frequency, which
relates directly to switching losses and the sizes of the inductors
and input and output capacitors. A clock frequency of 400 kHz
sets the switching frequency of each phase, f
SW
, to 200 kHz,
which represents a practical trade-off between the switching
losses and the sizes of the output filter components. From TPC
1, for 400 kHz the required timing capacitor value is 150 pF. For
good frequency stability and initial accuracy, it is recommended to
use a capacitor with low temperature coefficient and tight toler-
ance, e.g., an MLC capacitor with NPO dielectric and with 5%
or less tolerance.
Inductance Selection
The choice of inductance determines the ripple current in the
inductor. Less inductance leads to more ripple current, which
increases the output ripple voltage and the conduction losses in
the MOSFETs, but allows using smaller-size inductors and, for
a specified peak-to-peak transient deviation, output capacitors
with less total capacitance. Conversely, a higher inductance
means lower ripple current and reduced conduction losses, but
requires larger-size inductors and more output capacitance for
the same peak-to-peak transient deviation. In a two-phase con-
verter a practical value for the peak-to-peak inductor ripple
current is under 50% of the dc current in the same inductor.
With that choice, in this design example, under 50% ripple
current per inductor yields a total peak-to-peak output ripple cur-
rent of about 20% of the total dc output current. The following
equation shows the relationship between the inductance, oscilla-
tor frequency, peak-to-peak ripple current in an inductor, and
input and output voltages:
L
VV V
Vf I
IN OUT OUT
IN SW L RIPPLE
=
×
××
(– )
()
(1)
For 7 A peak-to-peak ripple current, which is 50% of the 14 A
full-load dc current in an inductor, Equation 1 yields an induc-
tance of:
L
VV V
VkHzA
nH=
×
××
=
(–.).
(/)
518 18
5400 27
823
A 1 µH inductor can be used, which gives a calculated ripple
current of 5.8 A at no load. The inductor should not saturate at
the peak current of 20 A and should be able to handle the sum
of the power dissipation caused by the average current of 15 A
in the winding and the core loss.
The output ripple current is smaller than the inductor ripple
current due to the two phases partially canceling. This can be
calculated as follows:
I
VV V
VLf
I
VV V
V H kHz
A
O
OUT IN OUT
IN SW
O
∆
∆
=
××
××
=
××
×µ ×
=
(– )
.(–.)
(/)
.
2
18 5 2 18
5 1 400 2
25
(2)
Designing an Inductor
Once the inductance is known, the next step is either to design an
inductor or find a standard inductor that comes as close as possible
to meeting the overall design goals. The first decision in design-
ing the inductor is to choose the core material. There are several
possibilities for providing low core loss at high frequencies. Two
examples are the powder cores (e.g., Kool-Mµ
®
from Magnetics)
and the gapped soft ferrite cores (e.g., 3F3 or 3F4 from Philips).
Low frequency powdered iron cores should be avoided due to
their high core loss, especially when the inductor value is relatively
low and the ripple current is high.
Two main core types can be used in this application. Open
magnetic loop types, such as beads, beads on leads, and rods
and slugs, provide lower cost but do not have a focused mag-
netic field in the core. The radiated EMI from the distributed
magnetic field may create problems with noise interference in
the circuitry surrounding the inductor. Closed-loop types, such
as pot cores, PQ, U, and E cores, or toroids, cost more, but
have much better EMI/RFI performance. A good compromise
between price and performance are cores with a toroidal shape.
There are many useful references for quickly designing a power
inductor. Table II gives some examples.
Table II. Magnetics Design References
Magnetic Designer Software
Intusoft (http://www.intusoft.com)
Designing Magnetic Components for High-Frequency DC-DC
Converters
McLyman, Kg Magnetics
ISBN 1-883107-00-08
