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TURBO-DECO-E2-U3

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
Lattice Semiconductor Turbo Decoder User’s Guide
16
Appendix for ispXPGA
®
FPGAs
Table 10. Performance and Utilization
1
Ordering Part Number
The Ordering Part Number (OPN) for all configurations of the Turbo Decoder core targeting ispXPGA devices is
TURBO-DECO-XP-N1. Table 1 lists the netlists available as Evaluation Packages for the ispXPGA device, which
can be downloaded from the Lattice web site at www.latticesemi.com. Use the IPexpress software tool to help gen-
erate new configurations of this IP core. IPexpress is the Lattice IP configuration utility, and is included as a stan-
dard feature of the ispLEVER design tools. Details regarding the usage of IPexpress can be found in the IPexpress
and ispLEVER help system. For more information on the ispLEVER design tools, visit the Lattice web site at:
www
.latticesemi.com/software.
Parameter File Mode Parameters
ispXPGA
PFUs LUTs Registers PIO EBR
f
MAX
(MHz)
turbo_deco_xp_1_001.lpc 3GPP See Table 1 2167 4586 3628 184 32 52
turbo_deco_xp_1_003.lpc CCSDS See Table 1 3486 5834 4966 269 49 46
1. Performance and utilization characteristics are generated targeting an LFX1200B-04FE680C in ispLEVER 3.x software. The evaluation
version of this IP core only works on this specific device density, package, and speed grade
Lattice Semiconductor Turbo Decoder User’s Guide
17
Appendix for LatticeECP/EC FPGAs
Table 11. Performance and Utilization
1
Ordering Part Number
The Ordering Part Number (OPN) for all configurations of the Turbo Decoder core targeting LatticeECP devices is
TURBO-DECO-E2-U3. Table 1 lists the parameter settings that are available for the Turbo Decoder. Use the IPex-
press software tool to help generate new configurations of this IP core. IPexpress is the Lattice IP configuration util-
ity, and is included as a standard feature of the ispLEVER design tools. Details regarding the usage of IPexpress
can be found in the IPexpress and ispLEVER help system. For more information on the ispLEVER design tools,
visit the Lattice web site at: www
.latticesemi.com/software.
IPexpress
User-Configurable Mode
SLICEs LUTs Registers I/Os
sysMEM™
EBRs
f
MAX
(MHz)
3GPP 2676 5230 2838 184 17 82
3GPP2 2834 5510 3020 249 49 84
CCSDS 4124 8093 4294 269 25 68
1. Performance and utilization characteristics are generated using LFECP33E-5F672C, with Lattice's ispLEVER v.7.1 SP1
software. When using this IP core in a different density, speed, or grade within the LatticeECP/EC family, performance and
utilization may vary.
Lattice Semiconductor Turbo Decoder User’s Guide
18
Appendix for LatticeECP2™ FPGAs
Table 12. Performance and Utilization
1
Ordering Part Number
The Ordering Part Number (OPN) for all configurations of the Turbo Decoder core targeting LatticeECP2 devices is
TURBO-ENCO-P2-U3. Table 1 lists the parameter settings that are available for the Turbo Decoder. Use the IPex-
press software tool to help generate new configurations of this IP core. IPexpress is the Lattice IP configuration util-
ity, and is included as a standard feature of the ispLEVER design tools. Details regarding the usage of IPexpress
can be found in the IPexpress and ispLEVER help system. For more information on the ispLEVER design tools,
visit the Lattice web site at: www
.latticesemi.com/software.
IPexpress
User-Configurable Mode
SLICEs LUTs Registers I/Os
sysMEM™
EBRs
f
MAX
(MHz)
3GPP 2732 5365 2831 184 13 126
3GPP2 2801 5490 3015 249 27 124
CCSDS 4274 8433 4295 269 16 115
1. Performance and utilization characteristics are generated using LFE2-70E-7F672C, with Lattice's ispLEVER v.7.1 SP1 soft-
ware. When using this IP core in a different density, speed, or grade within the LatticeECP2 family, performance and utiliza-
tion may vary.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

TURBO-DECO-E2-U3

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Lattice
Description:
Development Software Turbo Decoder
Lifecycle:
New from this manufacturer.
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