8
FN6756.1
December 10, 2015
IRQ/F
OUT
(Interrupt Output/Frequency Output)
This dual function pin can be used as an interrupt or
frequency output pin. The IRQ
/F
OUT
mode is selected via
the IRQE bit of the control register (address 08h). The
IRQ
/F
OUT
is an open drain output and requires the use of a
pull-up resistor, and it can accept a pull-up voltage up to
5.5V.
This pin has a default output of 32.768kHz at power-up.
• Interrupt Mode. The pin provides an interrupt signal
output. This signal notifies a host processor that an alarm
has occurred and requests action.
• Frequency Output Mode. The pin outputs a clock signal
which is related to the crystal frequency. The frequency
output is user selectable and enabled via the I
2
C bus.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of the
device. The input buffer on this pin is always active (not gated).
The SCL pin can accept a logic high voltage up to 5.5V.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor,
and it can accept a pull-up voltage up to 5.5V. The output
circuitry controls the fall time of the output signal with the use
of a slope controlled pull-down. The circuit is designed for
400kHz I
2
C interface speeds.
NOTE: Parts will work with SDA pull-up voltage above the V
PULLUP
limit but the t
AA
and t
F
in the I
2
C parameters are not guaranteed.
V
DD
, GND
Chip power supply and ground pins. The device will have full
operation with a power supply from 1.8V to 3.6V, and
timekeeping function with a power supply from 1.4V to 3.6V.
A 0.1µF decoupling capacitor is recommended on the V
DD
pin to ground.
NC (No Connection)
The NC pin is not connected to the die. The pin can be
connected to GND or left floating.
Functional Description
Real Time Clock Operation
The Real Time Clock (RTC) uses an external 32.768kHz quartz
crystal to maintain an accurate internal representation of
second, minute, hour, day of week, date, month, and year. The
RTC also has leap-year correction. The RTC also corrects for
months having fewer than 31 days and has a bit that controls
24 hour or AM/PM format. When the ISL12058 powers up after
the loss of V
DD
, the clock will not begin incrementing until at
least one byte is written to the clock register.
Accuracy of the Real Time Clock
The accuracy of the Real Time Clock depends on the
frequency of the quartz crystal that is used as the time base
for the RTC. Since the resonant frequency of a crystal is
temperature dependent, the RTC performance will also be
dependent upon temperature. The frequency deviation of
the crystal is a function of the turnover temperature of the
crystal from the crystal’s nominal frequency. For example, a
~20ppm frequency deviation translates into an accuracy of
~1 minute per month. These parameters are available from
the crystal manufacturer.
Alarm Interrupt
The alarm interrupt mode is enabled by setting IRQE bit to
‘1’ with Alarm1 enables by setting ALM1E to ‘1’.
The standard alarm allows for alarms of time, date, day of
the week, month, and year. When a time alarm occurs, the
IRQ
/F
OUT
pin will be pulled low and the alarm interrupt bit
(A1F) will be set to “1”.
NOTE: The A1F bit can be reset by the user or cleared automatically
using the Auto Reset mode (see ARST bit, address 07h). Alarm2
does not have hardware interrupt function.
Frequency Output Mode
The ISL12058 has the option to provide a frequency output
signal using the IRQ
/F
OUT
pin. The frequency output mode
is set by using the FO bits to select 4 possible output
frequency values from 1Hz to 32.768kHz. The IRQE bit must
be set to ‘0’ for frequency output.
I
2
C Serial Interface
The ISL12058 has an I
2
C serial bus interface that provides
access to the real time clock registers, control and status
registers and the alarm registers. The I
2
C serial interface is
compatible with other industry I
2
C serial bus protocols using
a bi-directional data signal (SDA) and a clock signal (SCL).
Register Descriptions
The registers are accessible following a slave byte of
“1101111x” and reads or writes to addresses [00h:1Fh]. The
defined addresses and default values are described in
Table 1. Address 15h to 1Fh are not used. Reads or writes to
15h to 1Fh will not affect operation of the device but should
be avoided. For Page Write and Page Read operation, the
address will wrap around from address 1Fh to 00h.
REGISTER ACCESS
The contents of the registers can be modified by performing
a byte or a page write operation directly to any register
address.
The registers are divided into 3 sections. These are:
1. Real Time Clock (7 bytes): Address 00h to 06h.
2. Control and Status (2 bytes): Address 07h to 08h.
3. Alarm1 and Alarm2 (9 bytes): Address 0Ch to 14h.
There are no addresses above 1Fh.
ISL12058
