IS65WV12816ALL, IS65WV12816BLL
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
11/09/07
CAPACITANCE
(1)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Input/Output Capacitance VOUT = 0V 10 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Vdd Min. Max. Unit
V
OH Output HIGH Voltage IOH = -0.1 mA 1.65-2.2V 1.4 V
IOH = -1 mA 2.5-3.6V 2.2 V
V
OL Output LOW Voltage IOL = 0.1 mA 1.65-2.2V 0.2 V
IOL = 2.1 mA 2.5-3.6V 0.4 V
VIH Input HIGH Voltage 1.65-2.2V 1.4 VDD + 0.2 V
2.5-3.6V 2.2 VDD + 0.3 V
V
IL
(1)
Input LOW Voltage 1.65-2.2V –0.2 0.4 V
2.5-3.6V –0.2 0.6 V
ILI Input Leakage GND VIN VDD –1 1 µA
ILO Output Leakage GND VOUT VDD, Outputs Disabled 1 1 µA
Notes:
1. VIL (min.) = –1.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
5
Rev. B
11/09/07
IS65WV12816ALL, IS65WV12816BLL
IS65WV12816ALL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter Test Conditions Options Max. Unit
-70 ns
I
CC Vdd Dynamic Operating VDD = Max., A, A1 15 mA
Supply Current IOUT = 0 mA, f = fMAX A2, A3 20
ICC1 Operating Supply VDD = Max., A, A1 7 mA
Current IOUT = 0 mA, f = 0 A2, A3 7
ISB1 TTL Standby Current VDD = Max., A, A1 0.6 mA
(TTL Inputs) VIN = VIH or VIL A2, A3 0.6
CS1 = VIH , CS2 = VIL,
f = 1 MHZ
OR
ULB Control
VDD = Max., VIN = VIH or VIL
CS1 = VIL, f = 0, UB = VIH, LB = VIH
ISB2 CMOS Standby VDD = Max., A, A1 15 µA
Current (CMOS Inputs) CS1
V DD – 0.2V, A2 20
CS2
0.2V, A3 50
VIN
V DD – 0.2V, or
VIN
0.2V, f = 0
OR
ULB Control VDD = Max., CS1 = VIL, CS2=VIH
VIN 0.2V, f = 0; UB / LB = VDD – 0.2V
IS65WV12816BLL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter Test Conditions Options Max. Max. Unit
-55 ns -70 ns
ICC Vdd Dynamic Operating VDD = Max., A, A1 25 20 mA
Supply Current IOUT = 0 mA, f = fMAX A2, A3 30 25
ICC1 Operating Supply VDD = Max., A, A1 7 7 mA
Current IOUT = 0 mA, f = 0 A2, A3 7 7
ISB1 TTL Standby Current VDD = Max., A, A1 0.6 0.6 mA
(TTL Inputs) VIN = VIH or VIL A2, A3 0.6 0.6
CS1 = VIH , CS2 = VIL,
f = 1 MHZ
OR
ULB Control
VDD = Max., VIN = VIH or VIL
CS1 = VIL, f = 0, UB = VIH, LB = VIH
ISB2 CMOS Standby VDD = Max., A, A1 15 15 µA
Current (CMOS Inputs) CS1
V DD – 0.2V, A2 25 25
CS2
0.2V, A3 65 65
VIN
V DD – 0.2V, or
VIN
0.2V, f = 0
OR
ULB Control VDD = Max., CS1 = VIL, CS2=VIH
VIN 0.2V, f = 0; UB / LB = VDD – 0.2V
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS65WV12816ALL, IS65WV12816BLL
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
11/09/07
AC TEST CONDITIONS
Parameter 65WV12816ALL 65WV12816BLL
(Unit) (Unit)
Input Pulse Level 0.4V to VDD-0.2V 0.4V to VDD-0.3V
Input Rise and Fall Times 5 ns 5ns
Input and Output Timing VREF VREF
and Reference Level
Output Load See Figures 1 and 2 See Figures 1 and 2
AC TEST LOADS
Figure 1 Figure 2
65WV12816ALL 65WV12816BLL
(1.65V-2.2V) (2.5V - 3.6V)
R1(
Ω)Ω)
Ω)Ω)
Ω) 3070 3070
R2(
Ω)Ω)
Ω)Ω)
Ω) 3150 3150
VREF 0.9V 1.5V
VTM 1.8V 2.8V
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
R1
30 pF
Including
jig and
scope
R2
OUTPUT
VTM

IS65WV12816BLL-55BLA3

Mfr. #:
Manufacturer:
ISSI
Description:
SRAM 2M (128Kx16) 55ns Async SRAM
Lifecycle:
New from this manufacturer.
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