Technical Note
7/20
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2011.08 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
BD8119FM-M
Buck-Boost DC/DC controller
Number of LEDs in series connection
Output voltage of the DCDC converter is controlled such that the forward voltage over each of the LEDs on the output is
set to 1.0V (Typ.). DCDC operation is performed only when the LED output is operating. When two or more LED outputs
are operating simultaneously, the LED voltage output is held at 1.0V (Typ.) per LED over the column of LEDs with the
highest VF value. The voltages of other LED outputs are increased only in relation to the fluctuation of voltage over this
column. Consideration should be given to the change in power dissipation due to variations in VF of the LEDs. Please
determine the allowable maximum VF variance of the total LEDs in series by using the description as shown below:
VF variation allowable voltage 3.7V(Typ.) = short detecting voltage 4.7V(Typ.) - LED control voltage 1.0V(Typ.)
The number of LEDs that can be connected in series is limited due to the open-circuit protection circuit, which engages at
85% of the set OVP voltage. Therefore, the maximum output voltage of the under normal operation becomes
30.6 V (= 36 V x 0.85, where (30.6 V – 1.0 V) / VF > N [maximum number of LEDs in series]).
Over-voltage protection circuit (OVP)
The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining an
appropriate trigger voltage of for OVP function, consider the total number of LEDs in series and the maximum variation in
VF. Also, bear in mind that over-current protection (OCP) is triggered at 0.85 x OVP trigger voltage. If the OVP function
engages, it will not release unless the DCDC voltage drops to 72.5% of the OVP trigger voltage. For example, if ROVP1
(output voltage side), ROVP2 (GND side), and DCDC voltage VOUT are conditions for OVP, then:
VOUT (ROVP1 + ROVP2) / ROVP2 x 2.0 V.
OVP will engage when VOUT > 32 V if ROVP1 = 330 k and ROVP2 = 22 k.
Buck-boost DC/DC converter oscillation frequency (FOSC)
The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 26).
This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency.
Refer to the following theoretical formula when setting RT:
fosc = x α [kHz]
30 x
10
6
(V/A/S) is a constant (±16.6%) determined by the internal circuitry, and α is a correction factor that varies in
relation to RT: { RT: α = 50k: 0.98, 60k: 0.985, 70k: 0.99, 80k: 0.994, 90k: 0.996, 100k: 1.0, 50k: 1.01, 200k:
1.02, 300k: 1.03, 400k: 1.04, 500k: 1.045 }
A resistor in the range of 62.6k523k is recommended. Settings that deviate from the frequency range shown below
may cause switching to stop, and proper operation cannot be guaranteed.
Fig.15 RT versus switching frequency
External DC/DC converter oscillating frequency synchronization (FSYNC)
Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present
on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µS (typ.)
occurs before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC
terminal is recognized). Moreover, if external input frequency is less than the internal oscillation frequency, the internal
oscillator will engage after the above-mentioned 30 µS (typ.) delay; thus, do not input a synchronization signal with a
frequency less than the internal oscillation frequency.
50K
150K
250K
350K
450K
550K
0 100 200 300 400 500 600 700 800
RT [kΩ]
周波数 [kHz]
30 × 10
6
RT [Ω]
Frequency
Technical Note
8/20
www.rohm.com
2011.08 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
BD8119FM-M
Soft Start Function
The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to
prevention of the overshoot of the output voltage and the inrush current.
Self-diagnostic functions
The operating status of the built-in protection circuitry is propagated to FAIL1 and FAIL2 pins (open-drain outputs). FAIL1
becomes low when UVLO, TSD, OVP, or SCP protection is engaged, whereas FAIL2 becomes low when open or short
LED is detected.
Operation of the Protection Circuitry
Under-Voltage Lock Out (UVLO)
The UVLO shuts down all the circuits other than REG when VCC 4.3V (TYP).
Thermal Shut Down (TSD)
The TSD shuts down all the circuits other than REG when the Tj reaches 175 (TYP), and releases when the Tj
becomes below 150 (TYP).
Over Current Protection (OCP)
The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor, and activates
when the CS voltage becomes less than VCC-0.6V (TYP).
When the OCP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
Over Voltage Protection (OVP)
The output voltage of the DCDC is detected with the OVP-pin voltage, and the protection activates when the OVP-pin
voltage becomes greater than 2.0V (TYP).
When the OVP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
Short Circuit Protection (SCP)
When the LED-pin voltage becomes less than 0.3V (TYP), the internal counter starts operating and latches off the circuit
approximately after 100ms (when FOSC = 300kHz). If the LED-pin voltage becomes over 0.3V before 100ms, then the
counter resets.
When the LED anode (i.e. DCDC output voltage) is shorted to ground, then the LED current becomes off and the LED-pin
voltage becomes low. Furthermore, the LED current also becomes off when the LED cathode is shorted to ground. Hence
in summary, the SCP works with both cases of the LED anode and the cathode being shorted.
LED Open Detection
When the LED-pin voltage 0.3V (TYP) as well as OVP-pin voltage 1.7V (TYP) simultaneously, the device detects as
LED open and latches off that particular channel.
UVLO
TSD
OVP
OCP
S
R
Q
SCP
EN=Low
UVLO/TSD
FAIL1
EN=Low
UVLO/TSD
FAIL2
MASK
Counter
OPEN
SHORT
S
R
Q
Technical Note
9/20
www.rohm.com
2011.08 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
BD8119FM-M
LED Short Detection
When the LED-pin voltage 4.7V (TYP) as well as OVP-pin voltage 1.6V (TYP) simultaneously the internal counter
starts operating, and approximately after 100ms (when FOSC = 300kHz) the only detected channel (as LED short)
latches off. With the PWM brightness control, the detecting operation is processed only when PWM-pin = High. If the
condition of the detection operation is released before 100ms (when FOSC = 300kHz), then the internal counter resets.
The counter frequency is the DCDC switching frequency determined by the RT. The latch proceeds at the count of 32770.
Protection
Detecting Condition
Operation after detect
[Detect] [Release]
UVLO VREG<4.3V VREG>4.5V All blocks shut down
TSD Tj>175 Tj<150
All blocks (but except REG)
shut down
OVP VOVP>2.0V VOVP<1.45V SS discharged
OCP VCSVCC-0.6V VCS>VCC-0.6V SS discharged
SCP
VLED<0.3V
(100ms delay when
FOSC=300kHz)
EN or UVLO
Counter starts and then latches off
all blocks (but except REG)
LED open VLED<0.3V & VOVP>1.7V EN or UVLO The only detected channel latches off
LED short
VLED>4.7V & VOVP<1.6V
(100ms delay when
FOSC=300kHz)
EN or UVLO
The only detected channel latches off
(after the counter sets)

BD8119FM-ME2

Mfr. #:
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Description:
LED Lighting Drivers Auto Grade LED Drvr
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New from this manufacturer.
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