Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
11
An
(Bn)
t
PHL
V
M
V
M
V
M
BPAR
(APAR)
INPUT
OUTPUT
APAR
(BPAR)
0
ODD/EVEN
1
t
PLH
V
M
EVEN PARITY
SEL
INPUT
NOTE: Only even parity mode is shown with even parity. Odd parity mode would cause inverted output
and odd parity mode would be with ODD/EVEN = 1
SA00300
Waveform 8. Propagation Delay, SEL to BPAR or SEL to APAR
V
M
APAR, An]
(BPAR, Bn)
INPUT
SEL
1
LEA
(LEB)
t
PHL
V
M
Bn, BPAR
(An, APAR)
INPUT
OUTPUT
t
PLH
V
M
V
M
SA00301
Waveform 9. Propagation Delay, LEA to BPAR or LEB to APAR, LEA to Bn or LEB to An
V
M
APAR, BPAR,
An, Bn
V
M
V
M
V
M
V
M
V
M
LEA, LEB
t
s
(H)
t
h
(H)
t
s
(L)
t
h
(L)
t
w
(H)
V
M
SA00302
The shaded areas indicate when the input is permitted to change for predictable output performance.
Waveform 10. Data Setup and Hold Times, Pulse Width High
