Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
4
4
5
1
0
mux
9–bit
Output
Buffer
OE
9–bit
Output
Buffer
9–bit
Transparent
Latch
LE
Parity
Generator
Parity
Generator
1
0
mux
OE
9–bit
Transparent
Latch
LE
27
3
6
7
8
9
10
11
12
16
1
17
13
26
24
23
25
22
21
20
19
18
2
15
OEB
LEA
A0
A1
A2
A3
A4
A5
A6
A7
APAR
OEA
SEL
ODD/
EVEN
LEB
B7
BPAR
B6
B5
B4
B3
B2
B1
B0
ERRA
ERRB
SA00292
FUNCTION TABLE
INPUTS OPERATING MODE
OEB OEA SEL LEA LEB
H H X X X 3-State A bus and B bus (input A & B simultaneously)
H L L L H B A, transparent B latch, generate parity from B0 - B7, check B bus parity
H L L H H B A, transparent A & B latch, generate parity from B0 - B7, check A & B bus parity
H L L X L B A, B bus latched, generate parity from latched B0 - B7 data, check B bus parity
H L H X H B A, transparent B latch, parity feed-through, check B bus parity
H L H H H B A, transparent A & B latch, parity feed-through, check A & B bus parity
L H L H X A B, transparent A latch, generate parity from A0 - A7, check A bus parity
L H L H H A B, transparent A & B latch, generate parity from A0 - A7, check A & B bus parity
L H L L X A B, A bus latched, generate parity from latched A0 - A7 data, check A bus parity
L H H H L A B, transparent A latch, parity feed-through, check A bus parity
L H H H H A B, transparent A & B latch, parity feed-through, check A & B bus parity
L L X X X Output to A bus and B bus (NOT ALLOWED)
H = High voltage level
L = Low voltage level
X = Don’t care
Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
5
PARITY AND ERROR FUNCTION TABLE
INPUTS OUTPUTS
SEL ODD/EVEN
xPAR
(A or B)
Σ of High
Inputs
xPAR
(B or A)
ERRt ERRr*
PARITY MODES
H H H
Even
Odd
H
H
H
L
H
L Odd
H H L
Even
Odd
L
L
L
H
L
H
Mode
Feed-through/check parity
H L H
Even
Odd
H
H
L
H
L
H Even
H L L
Even
Odd
L
L
H
L
H
L
Mode
L H H
Even
Odd
H
L
H
L
H
H Odd
L H L
Even
Odd
H
L
L
H
H
H
Mode
Generate parity
L L H
Even
Odd
L
H
L
H
H
H Even
L L L
Even
Odd
L
H
H
L
H
H
Mode
H = High voltage level
L = Low voltage level
t = Transmit–if the data path is from AB then ERRt
is ERRA
r = Receive–if the data path is from AB then ERRr is ERRB
* Blocked if latch is not transparent
ABSOLUTE MAXIMUM RATINGS
1,
2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current V
I
< 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current V
O
< 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 1505C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
6
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
Min Max
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
t/v Input transition rise or fall rate 0 5 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
Min Typ Max Min Max
V
IK
Input clamp voltage V
CC
= 4.5V; I
IK
= –18mA –0.9 –1.2 –1.2 V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5 3.5 2.5 V
V
OH
High-level output voltage V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0 4.0 3.0 V
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
2.0 2.6 2.0 V
V
OL
Low-level output voltage V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42 0.55 0.55 V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13 0.55 0.55 V
I
I
Input leakage Control pins V
CC
= 5.5V; V
I
= GND or 5.5V ±0.01 ±1.0 ±1.0 µA
current Data pins V
CC
= 5.5V; V
I
= GND or 5.5V ±5 ±100 ±100 µA
I
OFF
Power-off leakage current V
CC
= 0.0V; V
O
or V
I
4.5V ±5.0 ±100 ±100 µA
I
PU
/I
PD
Power-up/down 3-State
output current
4
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
±5.0 ±50 ±50 µA
I
IH
+ I
OZH
3-State output High current V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
5.0 50 50 µA
I
IL
+ I
OZL
3-State output Low current V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
–5.0 –50 –50 µA
I
CEX
Output High leakage current V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0 50 50 µA
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V –50 –80 –180 –50 –180 mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
50 250 250 µA
I
CCL
Quiescent supply current V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
28 34 34 mA
I
CCZ
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
50 250 250 µA
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.3 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V ± 10%, a
transition time of up to 100µsec is permitted.

74ABT899D,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC 9BIT DUAL LATCH TXRX 28SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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