Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
7
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500
T
amb
= –40 to +85
o
C
V
CC
= +5.0V ±10%
C
L
= 50pF
R
L
= 500
UNIT
Min Typ Max Min Max
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
1
1.0
1.0
3.2
2.7
4.5
4.1
1.0
1.0
4.9
4.6
ns
t
PLH
t
PHL
Propagation delay
An to BPAR or Bn to APAR
2
3.0
2.5
6.0
6.4
7.5
7.9
3.0
2.5
9.0
8.8
ns
t
PLH
t
PHL
Propagation delay
An to ERRA or Bn to ERRB
3
2.8
2.8
6.0
6.7
8.0
8.5
2.8
2.8
9.1
9.3
ns
t
PLH
t
PHL
Propagation delay
APAR to BPAR or BPAR to APAR
1
2.0
1.3
4.0
3.2
5.2
4.4
2.0
1.3
5.7
5.0
ns
t
PLH
t
PHL
Propagation delay
APAR to ERRA or BPAR to ERRB
6
1.5
1.5
4.2
4.0
5.4
5.4
1.5
1.5
6.0
6.1
ns
t
PLH
t
PHL
Propagation delay
ODD/EVEN to APAR or BPAR
5
2.6
2.5
5.5
5.3
6.8
6.7
2.6
2.5
8.1
7.8
ns
t
PLH
t
PHL
Propagation delay
ODD/EVEN to ERRA or ERRB
4
2.3
2.6
5.4
5.7
6.8
7.2
2.3
2.6
7.9
8.4
ns
t
PLH
t
PHL
Propagation delay
SEL
to APAR or BPAR
8
1.3
1.4
4.1
4.1
5.2
5.3
1.3
1.4
6.0
5.9
ns
t
PLH
t
PHL
Propagation delay
SEL to ERRA or ERRB
8
3.7
5.1
6.8
8.3
8.3
9.7
3.7
5.1
9.8
11.0
ns
t
PLH
t
PHL
Propagation delay
LEA to Bn or LEB to An
9
1.0
1.0
3.2
3.1
4.4
4.5
1.0
1.0
4.9
5.0
ns
t
PLH
t
PHL
Propagation delay
LEA to BPAR or LEB to APAR
9
2.0
1.7
6.8
6.3
8.3
7.9
2.0
1.7
9.7
9.0
ns
t
PLH
t
PHL
Propagation delay
LEA to ERRA or LEB to ERRB
7
2.0
2.0
6.3
7.1
8.3
9.2
2.0
2.0
9.6
10.3
ns
t
PZH
t
PZL
Output enable time
OEA to An, APAR or OEB to Bn, BPAR
11, 12
1.0
1.0
3.0
3.4
4.3
4.8
1.0
1.0
5.1
5.4
ns
t
PHZ
t
PLZ
Output disable time
OEA to An, APAR or OEB to Bn, BPAR
11, 12
1.0
0.5
3.4
3.0
4.7
4.2
1.0
0.5
5.5
4.7
ns
AC SETUP REQUIREMENTS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500
T
amb
= –40 to +85
o
C
V
CC
= +5.0V ±10%
C
L
= 50pF
R
L
= 500
UNIT
Min Typ Max Min Max
t
s
(H)
t
s
(L)
Setup time, High or Low
An, APAR to LEA or Bn, BPAR to LEB
10
2.0
1.5
0.4
0.0
2.0
1.5
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
An, APAR to LEA or Bn, BPAR to LEB
10
1.5
1.0
0.0
–0.2
1.5
1.0
ns
t
w
(H)
Pulse width, High
LEA or LEB
10 3.0 1.9 3.0 ns
Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
8
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
An, APAR
(Bn, BPAR)
V
M
t
PLH
t
PHL
V
M
V
M
V
M
Bn, BPAR
(An, APAR)
SEL
1
INPUT
OUTPUT
SA00293
Waveform 1. Propagation Delay, An to Bn, Bn to An, APAR to BPAR, BPAR to APAR
An
(Bn)
t
PLH
V
M
V
M
V
M
BPAR
(APAR)
LEA
(LEB)
1
INPUT
OUTPUT
ODD/EVEN
0
SEL
0
t
PHL
V
M
ODD PARITY
EVEN PARITY ODD PARITY
NOTE: Only even parity mode is shown, odd parity mode would be with ODD/EVEN = 1
SA00294
Waveform 2. Propagation Delay, An to BPAR or Bn to APAR
An
(Bn)
t
PHL
V
M
V
M
V
M
ERRA
(ERRB)
LEA
(LEB)
1
INPUT
OUTPUT
APAR
(BPAR)
0
ODD/EVEN
0
t
PLH
V
M
ODD PARITY
EVEN PARITY ODD PARITY
NOTE: Only even parity mode is shown, odd parity mode would be with ODD/EVEN = 1
SA00295
Waveform 3. Propagation Delay, An to ERRA or Bn to ERRB
Philips Semiconductors Product specification
74ABT899
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
1998 Jan 16
9
APAR
(BPAR)
V
M
t
PLH
t
PHL
V
M
V
M
V
M
ERRA
(ERRB)
INPUT
OUTPUT
1
An
(Bn)
EVEN PARITY
ODD/EVEN
INPUT
NOTE: Only even parity mode is shown, odd parity mode would cause inverted output
SA00296
Waveform 4. Propagation Delay, ODD/EVEN to ERRA or ODD/EVEN to ERRB
t
PHL
V
M
V
M
V
M
BPAR
(APAR)
INPUT
OUTPUT
APAR
(BPAR)
0
SEL
0
t
PLH
V
M
EVEN PARITY
ODD/EVEN
INPUT
NOTE: Only even parity mode is shown, odd parity mode would cause inverted output
An
(Bn)
SA00297
Waveform 5. Propagation Delay, ODD/EVEN to APAR or ODD/EVEN to BPAR

74ABT899D,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC 9BIT DUAL LATCH TXRX 28SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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