2004 Jan 15 11
Philips Semiconductors Product specification
On/off logic IC SAA1305T
I
2
C-BUS INTERFACE COMMANDS
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2
C-bus communication is only possible in the run mode.
Read mode operations
Only the sequential read mode is possible. The IC starts
after every device select (code 48) to output data 1.
However, in this event the master does acknowledge the
data output and the IC continues to output the next data in
sequence; see Figs 6 and 7.
To terminate the stream of bytes, the master must not
acknowledge the last byte output, but must generate a
STOP condition. The output data is from consecutive byte
addresses, with the internal byte address counter
automatically incremented after each byte output. In the
event of higher read sequences than available data bytes,
the 7th and 8th bit content are 0 and the address counter
will generate a wrap around (output at address 0).
The definitions of the bits are given in Tables 5, 6 and 7.
Fig.6 I
2
C-bus read mode sequence.
andbook, full pagewidth
S PDEVICE SELECT DATA 1
acknowledge
DATA N
R/W
START
condition
STOP
condition
acknowledge acknowledge no acknowledge
MGR221
Fig.7 I
2
C-bus read data sequence.
handbook, full pagewidth
MGR222
START DEVICE SELECT STATUS OLD NEW WATCH
byte 0 1 2 3, 4, 5, 6, 7
STOP
