74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 9 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
Test data is given in Table 9.
Definitions test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= Test voltage for switching times.
Fig 11. Test circuitry for switching times
V
EXT
V
CC
V
I
V
O
001aae235
DUT
C
L
R
T
R
L
R
L
PULSE
GENERATOR
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
Table 9. Test data
Input Load V
EXT
V
I
f
i
t
W
t
r
, t
f
C
L
R
L
t
PHZ
, t
PZH
t
PLZ
, t
PZL
t
PLH
, t
PHL
2.7 V 10 MHz 500 ns 2.5 ns 50 pF 500 GND 6 V open
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 10 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
12. Package outline
Fig 12. Package outline SOT163-1 (SO20)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
99-12-27
03-02-19
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 11 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
Fig 13. Package outline SOT339-1 (SSOP20)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
Q
(1)
Zywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
0.65
7.9
7.6
0.9
0.7
0.9
0.5
8
0
o
o
0.131.25 0.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT339-1 MO-150
99-12-27
03-02-19
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M
A
(A )
3
A
110
20 11
y
0.25
pin 1 index
0 2.5 5 mm
scale
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
A
max.
2

74LVT573D,112

Mfr. #:
Manufacturer:
Nexperia
Description:
Latches 3.3V OCTAL D TRANS
Lifecycle:
New from this manufacturer.
Delivery:
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