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74LVT573D,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 3 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
5. Pinning information
5.1 Pinning
Fig 3. Logic diagram
mna810
Q4
D4
D
LE
Q
Q3
D3
D
LE
Q
Q2
D2
D
LE
Q
Q1
D1
D
LELELE
Q
Q0
D0
D
LATCH
1
LATCH
2
LATCH
3
LATCH
4
LATCH
5
Q
LE
OE
LE LE LE LE
Q5
D5
D
LE
Q
LATCH
6
LE
Q6
D6
D
LE
Q
LATCH
7
LE
Q7
D7
D
LE
Q
LATCH
8
LE
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4. Pin configuration for SO20 and (T)SSOP20 Fig 5. Pin configuration for DHVQFN20
74LVT573
OE V
CC
D0 Q0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
GND LE
001aah713
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 4 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
5.2 Pin description
6. Functional description
6.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
= HIGH-to-LOW latch enable transition;
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition;
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition;
Z = high-impedance OFF-state;
NC = no change;
X = don’t care.
7. Limiting values
Table 2. Pin description
Symbol Pin Description
OE
1 output enable input (active LOW)
D0 to D7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0 V)
LE 11 latch enable (active HIGH)
Q0 to Q7 19, 18, 17, 16, 15, 14, 13, 12 data output
V
CC
20 supply voltage
Table 3. Function table
[1]
Operating mode Control OE Control LE Input Dn Internal register Output Qn
Load and read register
enable
LHLLL
HHH
Latch and read register L lLL
hHH
Hold L L X NC NC
Disable outputs H L X NC Z
HDnDnZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +4.6 V
V
I
input voltage
[1]
0.5 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
0.5 +7.0 V
I
IK
input clamping current V
I
<0V - 50 mA
I
OK
output clamping current V
O
<0V - 50 mA
I
O
output current output in LOW-state - 128 mA
output in HIGH-state - 64 mA
74LVT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 22 November 2011 5 of 17
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; 3-state
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
[3] For SO20 packages: above 70 C derate linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
8. Recommended operating conditions
9. Static characteristics
T
stg
storage temperature 65 +150 C
T
j
junction temperature
[2]
- 150 C
P
tot
total power dissipation T
amb
= 40 C to +85 C
[3]
- 500 mW
Table 4. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 2.7 - 3.6 V
V
I
input voltage 0 - 5.5 V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
I
OH
HIGH-level output current - - 32 mA
I
OL
LOW-level output current - - 32 mA
current duty cycle 50 %; f
i
1kHz--64mA
T
amb
ambient temperature in free air 40 - +85 C
t/V input transition rise and fall rate outputs enabled - - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
V
IK
input clamping voltage V
CC
= 2.7 V; I
IK
= 18 mA 1.2 0.9 - V
V
OH
HIGH-level output voltage V
CC
= 2.7 V to 3.6 V;
I
OH
= 100 A
V
CC
0.2 V
CC
0.1 - V
V
CC
= 2.7 V; I
OH
= 8mA 2.4 2.5 - V
V
CC
= 3.0 V; I
OH
= 32 mA 2.0 2.2 - V
V
OL
LOW-level output voltage V
CC
= 2.7 V; I
OL
=100A-0.10.2V
V
CC
= 2.7 V; I
OL
=24mA - 0.3 0.5 V
V
CC
= 3.0 V I
OL
= 16 mA - 0.25 0.4 V
V
CC
= 3.0 V I
OL
=32mA - 0.3 0.5 V
V
CC
= 3.0 V I
OL
=64mA - 0.4 0.55 V
V
OL(pu)
power-up LOW-level
output voltage
V
CC
= 3.6 V; I
O
=1mA;
V
I
=GNDorV
CC
[2]
- 0.13 0.55 V
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74LVT573D,112

Mfr. #:
Buy 74LVT573D,112
Manufacturer:
Nexperia
Description:
Latches 3.3V OCTAL D TRANS
Lifecycle:
New from this manufacturer.
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